Peng Chen

Orcid: 0000-0003-0808-5451

Affiliations:
  • National University of Singapore, Singapore
  • Chongqing University, College of Computer Science, Chongqing, China (PhD 2021)


According to our database1, Peng Chen authored at least 25 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2024
DAG-Order: An Order-Based Dynamic DAG Scheduling for Real-Time Networks-on-Chip.
ACM Trans. Archit. Code Optim., March, 2024

Flip: Data-centric Edge CGRA Accelerator.
ACM Trans. Design Autom. Electr. Syst., January, 2024

ZNS-Cleaner: Enhancing lifespan by reducing empty erase in ZNS SSDs.
J. Syst. Archit., 2024

GAP: A Global Wear-Aware Block Pool for Enhancing Lifetime of ZNS SSDs.
Proceedings of the 13th Non-Volatile Memory Systems and Applications Symposium, 2024

Hi-ZNS: High Space Efficiency and Zero-Copy LSM-Tree Based Stores on ZNS SSDs.
Proceedings of the 53rd International Conference on Parallel Processing, 2024

2022
ArSMART: An Improved SMART NoC Design Supporting Arbitrary-Turn Transmission.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

LAMP: Load-Balanced Multipath Parallel Transmission in Point-to-Point NoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Contention Minimization in Emerging SMART NoC via Direct and Indirect Routes.
IEEE Trans. Computers, 2022

2021
MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems.
ACM Trans. Embed. Comput. Syst., 2021

Contention-Aware Routing for Thermal-Reliable Optical Networks-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Reduced Worst-Case Communication Latency Using Single-Cycle Multihop Traversal Network-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Partial order based non-preemptive communication scheduling towards real-time networks-on-chip.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020
Contention Minimized Bypassing in SMART NoC.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Timing-Anomaly Free Dynamic Scheduling of Conditional DAG Tasks on Multi-Core Systems.
ACM Trans. Embed. Comput. Syst., 2019

Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Routing in optical network-on-chip: minimizing contention with guaranteed thermal reliability.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Chip Temperature Optimization for Dark Silicon Many-Core Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Fine-Grained Task-Level Parallel and Low Power H.264 Decoding in Multi-Core Systems.
Proceedings of the 24th IEEE International Conference on Parallel and Distributed Systems, 2018

User Experience-Enhanced and Energy-Efficient Task Scheduling on Heterogeneous Multi-Core Mobile Systems.
Proceedings of the 24th IEEE International Conference on Parallel and Distributed Systems, 2018

2017
FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era.
IEEE Trans. Parallel Distributed Syst., 2017

Hardware-software collaboration for dark silicon heterogeneous many-core systems.
Future Gener. Comput. Syst., 2017

Fixed priority scheduling of real-time flows with arbitrary deadlines on smart NoCs: work-in-progress.
Proceedings of the Thirteenth ACM International Conference on Embedded Software 2017 Companion, 2017

Task Mapping on SMART NoC: Contention Matters, Not the Distance.
Proceedings of the 54th Annual Design Automation Conference, 2017

Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017


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