Peitian Pan
According to our database1,
Peitian Pan
authored at least 12 papers
between 2017 and 2024.
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Bibliography
2024
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
2023
Symbolic Elaboration: Checking Generator Properties in Dynamic Hardware Description Languages.
Proceedings of the 21st ACM-IEEE International Symposium on Formal Methods and Models for System Design, 2023
Formal Verification of the Stall Invariant Property for Latency-Insensitive RTL Modules.
Proceedings of the 21st ACM-IEEE International Symposium on Formal Methods and Models for System Design, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2021
PyH2: Using PyMTL3 to Create Productive and Open-Source Hardware Testing Methodologies.
IEEE Des. Test, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
UMOC: Unified Modular Ordering Constraints to Unify Cycle- and Register-Transfer-Level Modeling.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
PyMTL3: A Python Framework for Open-Source Hardware Modeling, Generation, Simulation, and Verification.
IEEE Micro, 2020
2019
CongraPlus: Towards Efficient Processing of Concurrent Graph Queries on NUMA Machines.
IEEE Trans. Parallel Distributed Syst., 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
2018
A Network-Centric Hardware/Algorithm Co-Design to Accelerate Distributed Training of Deep Neural Networks.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
2017
Congra: Towards Efficient Processing of Concurrent Graph Queries on Shared-Memory Machines.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017