Pei-Yao Chang

According to our database1, Pei-Yao Chang authored at least 9 papers between 2011 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Green Smart Campus Monitoring and Detection Using LoRa.
Sensors, 2021

2016
Zero-Counting and Adaptive-Latency Cache Using a Voltage-Guardband Breakthrough for Energy-Efficient Operations.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

2015
A Calibration-Free PVTD-Variation-Tolerant Sensing Scheme for Footless-8T SRAM Designs.
IEEE Trans. Multi Scale Comput. Syst., 2015

2013
Variation-aware and adaptive-latency accesses for reliable low voltage caches.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 4R/2W Register File Design for UDVS Microprocessors in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

Design of 65 nm Sub-Threshold SRAM Using the Bitline Leakage Prediction Scheme and the Non-trimmed Sense Amplifier.
IEICE Trans. Electron., 2012

2011
Design of Subthreshold SRAMs for Energy-Efficient Quality-Scalable Video Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

Variation-resilient voltage generation for SRAM weak cell testing.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011


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