Pedro J. Gil

Orcid: 0000-0002-9364-7385

According to our database1, Pedro J. Gil authored at least 72 papers between 1996 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Hybrid Technique Based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM Arrays.
IEEE Access, 2024

2019
Ultrafast Codes for Multiple Adjacent Error Correction and Double Error Detection.
IEEE Access, 2019

2018
Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes.
Proceedings of the 8th Latin-American Symposium on Dependable Computing, 2018

2016
Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System.
IEEE Trans. Reliab., 2016

Speeding-Up Simulation-Based Fault Injection of Complex HDL Models.
Proceedings of the 2016 Seventh Latin-American Symposium on Dependable Computing, 2016

Ultrafast Error Correction Codes for Double Error Detection/Correction.
Proceedings of the 12th European Dependable Computing Conference, 2016

2015
MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Ultrafast Single Error Correction Codes for Protecting Processor Registers.
Proceedings of the 11th European Dependable Computing Conference, 2015

Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults.
Proceedings of the 11th European Dependable Computing Conference, 2015

2014
Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor.
IEEE Trans. Reliab., 2014

Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper).
Proceedings of the 2014 Tenth European Dependable Computing Conference, 2014

2013
Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels.
Proceedings of the Computer Safety, Reliability, and Security, 2013

Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses.
Proceedings of the Sixth Latin-American Symposium on Dependable Computing, 2013

Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines.
Proceedings of the Dependable Computing - 14th European Workshop, 2013

Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach.
Proceedings of the Dependable Computing - 14th European Workshop, 2013

The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs.
Proceedings of the Dependable Computing - 14th European Workshop, 2013

2012
Studying the effects of intermittent faults on a microcontroller.
Microelectron. Reliab., 2012

Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection.
IEEE Des. Test, 2012

Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011
Towards benchmarking routing protocols in wireless mesh networks.
Ad Hoc Networks, 2011

Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study.
Proceedings of the 30th IEEE Symposium on Reliable Distributed Systems (SRDS 2011), 2011

Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks.
Proceedings of The Tenth IEEE International Symposium on Networking Computing and Applications, 2011

On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks.
Proceedings of the 5th Latin-American Symposium on Dependable Computing, 2011

Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study.
Proceedings of the 13th European Workshop on Dependable Computing, 2011

2010
Attack Injection to Support the Evaluation of Ad Hoc Networks.
Proceedings of the 29th IEEE Symposium on Reliable Distributed Systems (SRDS 2010), New Delhi, Punjab, India, October 31, 2010

Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

Experimental validation of a fault tolerant microcomputer system against intermittent faults.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010

2009
Dependability assessment of by-wire control systems using fault injection.
J. Syst. Archit., 2009

An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks.
Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, 2009

Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores.
Proceedings of the Fourth Latin-American Symposium on Dependable Computing, 2009

Design and Deployment of a Generic ECC-based Fault Tolerance Mechanism for Embedded HW Cores.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2009

2008
Enhancement of Fault Injection Techniques Based on the Modification of VHDL Code.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Fault Emulation for Dependability Evaluation of VLSI Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Generic Design and Automatic Deployment of NMR Strategies on HW Cores.
Proceedings of the 14th IEEE Pacific Rim International Symposium on Dependable Computing, 2008

Injecting intermittent faults for the dependability validation of commercial microcontrollers.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

Dependability Assessment for the Selection of Embedded Cores.
Proceedings of the Seventh European Dependable Computing Conference, 2008

Analysis of the influence of intermittent faults in a microcontroller.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2006
FADES: a fault emulation tool for fast dependability assessment.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Fast Emulation of Permanent Faults in VLSI Systems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Temporal Characterization of Embedded Systems Using Nexus.
Proceedings of the Sixth European Dependable Computing Conference, 2006

Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems.
Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN 2006), 2006

2005
On-chip Debugging-based Fault Emulation for Robustness Evaluation of Embedded Software Components.
Proceedings of the 11th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2005), 2005

Improvement of fault injection techniques based on VHDL code modification.
Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

Impact of Faults in Combinational Logic of Commercial Microcontrollers.
Proceedings of the Dependable Computing, 2005

Fast Run-Time Reconfiguration for SEU Injection.
Proceedings of the Dependable Computing, 2005

2004
Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques.
Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

On Benchmarking the Dependability of Automotive Engine Control Applications.
Proceedings of the 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June, 2004

Experiences during the Experimental Validation of the Time-Triggered Architecture.
Proceedings of the 2004 Design, 2004

2003
Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system.
Microelectron. J., 2003

Improving the Multiple Errors Detection Coverage in Distributed Embedded Systems.
Proceedings of the 22nd Symposium on Reliable Distributed Systems (SRDS 2003), 2003

Non-intrusive Software-Implemented Fault Injection in Embedded Systems.
Proceedings of the Dependable Computing, First Latin-American Symposium, 2003

INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems.
Proceedings of the 2003 International Conference on Dependable Systems and Networks (DSN 2003), 2003

2002
A prototype of a VHDL-based fault injection tool: description and application.
J. Syst. Archit., 2002

Using VHDL-Based Fault Injection to exercise Error Detection Mechanisms in the Time-Triggered Architecture.
Proceedings of the 9th Pacific Rim International Symposium on Dependable Computing (PRDC 2002), 2002

A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques.
Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

2001
A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

Comparison and Application of Different VHDL-Based Fault Injection Techniques.
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000
Techniques to increase the schedulable utilization of cache-based preemptive real-time systems.
J. Syst. Archit., 2000

A Study of the Effects of Transient Fault Injection into the VHDL Model of a Fault-Tolerant Microcomputer System.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

An alternative to unify performance and reliability analysis of industrial applications.
Proceedings of the 14<sup>th</sup> European Simulation Multiconference, 2000

A Prototype of a VHDL-Based Fault Injection Tool.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1999
Distributed industrial control systems: a fault-tolerant architecture.
Microprocess. Microsystems, 1999

Design and Validation of a Distributed Industrial Control System's Nodes.
Proceedings of the Eighteenth Symposium on Reliable Distributed Systems, 1999

Hierarchical Reliability and Safety Models of Fault Tolerant Distributed Industrial Control Systems.
Proceedings of the Computer Safety, 1999

Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems.
Proceedings of the Parallel and Distributed Processing, 1999

Fault Injection into VHDL Models: Experimental Validation of a Fault Tolerant Microcomputer System.
Proceedings of the Dependable Computing, 1999

1998
Fault Injection into VHDL Models: Analysis of the Error Syndrome of a Microcomputer System.
Proceedings of the 24th EUROMICRO '98 Conference, 1998

1996
Using harmonic task-sets to increase the schedulable utilization of cache-based preemptive real-time systems.
Proceedings of the Third International Workshop on Real-Time Computing Systems Application (RTCSA '96), October 30, 1996

Adding instruction cache effect to schedulability analysis of preemptive real-time systems.
Proceedings of the 2nd IEEE Real-Time Technology and Applications Symposium, 1996

Dependability Models of RAID Using Stochastic Activity Networks.
Proceedings of the Dependable Computing, 1996

Adding Instruction Cache Effect to an Exact Schedulability Analysis of Preemptive Real-Time Systems.
Proceedings of the Eighth Euromicro Workshop on Real-Time Systems, 1996


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