Pedro Henrique de Mello Morado Penna
Orcid: 0000-0003-3617-2915Affiliations:
- Pontifical Catholic University of Minas Gerais, Belo Horizonte, Brazil
According to our database1,
Pedro Henrique de Mello Morado Penna
authored at least 18 papers
between 2015 and 2023.
Collaborative distances:
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Bibliography
2023
LWMPI: An MPI library for NoC-based lightweight manycore processors with on-chip memory constraints.
Concurr. Comput. Pract. Exp., 2023
Proceedings of the 29th Symposium on Operating Systems Principles, 2023
2021
Nanvix : A Distributed Operating System for Lightweight Manycore Processors. (Nanvix : un système d'exploitation distribué pour les processeurs manycore légers).
PhD thesis, 2021
Inter-kernel communication facility of a distributed operating system for NoC-based lightweight manycores.
J. Parallel Distributed Comput., 2021
Co-Designing Clusters of Lightweight Manycores and Asymmetric Operating System Kernels.
IEEE Embed. Syst. Lett., 2021
Proceedings of the SOSP '21: ACM SIGOPS 28th Symposium on Operating Systems Principles, 2021
A Task-based Execution Engine for Distributed Operating Systems Tailored to Lightweight Manycores with Limited On-Chip Memory.
Proceedings of the 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, 2021
A trace-driven methodology to evaluate and optimize memory management services of distributed operating systems for lightweight manycores.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021
2019
Concurr. Comput. Pract. Exp., 2019
On the Performance and Isolation of Asymmetric Microkernel Design for Lightweight Manycores.
Proceedings of the IX Brazilian Symposium on Computing Systems Engineering, 2019
Teaching Parallel Programming to Freshmen in an Undergraduate Computer Science Program.
Proceedings of the IEEE Frontiers in Education Conference, 2019
2018
Energy Efficient Parallel K-Means Clustering for an Intel® Hybrid Multi-Chip Package.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018
2017
CAP Bench: a benchmark suite for performance and energy evaluation of low-power many-core processors.
Concurr. Comput. Pract. Exp., 2017
Design methodology for workload-aware loop scheduling strategies based on genetic algorithm and simulation.
Concurr. Comput. Pract. Exp., 2017
Proceedings of the VII Brazilian Symposium on Computing Systems Engineering, 2017
Proceedings of the International Conference on Computational Science, 2017
2016
Proceedings of the Euro-Par 2016: Parallel Processing Workshops, 2016
2015
On the energy efficiency and performance of irregular application executions on multicore, NUMA and manycore platforms.
J. Parallel Distributed Comput., 2015