Pedro Emiliano Paro Filho

According to our database, Pedro Emiliano Paro Filho authored at least 5 papers between 2015 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

A DTC-Based Subsampling PLL Capable of Self-Calibrated Fractional Synthesis and Two-Point Modulation.

Nereo Markulic, Kuba Raczkowski, Ewout Martens, Pedro Emiliano Paro Filho, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx

IEEE J. Solid State Circuits, 2016

9.7 A self-calibrated 10Mb/s phase modulator with -37.4dB EVM based on a 10.1-to-12.4GHz, -246.6dB-FOM, fractional-N subsampling PLL.

Nereo Markulic, Kuba Raczkowski, Ewout Martens, Pedro Emiliano Paro Filho, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

13.7 A 0.22mm2 CMOS resistive charge-based direct-launch digital transmitter with -159dBc/Hz out-of-band noise.

Pedro Emiliano Paro Filho, Mark Ingels, Piet Wambacq, Jan Craninckx

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

An Incremental-Charge-Based Digital Transmitter With Built-in Filtering.

Pedro Emiliano Paro Filho, Mark Ingels, Piet Wambacq, Jan Craninckx

IEEE J. Solid State Circuits, 2015

9.3 A transmitter with 10b 128MS/S incremental-charge-based DAC achieving -155dBc/Hz out-of-band noise.

Pedro Emiliano Paro Filho, Mark Ingels, Piet Wambacq, Jan Craninckx

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015