Pedro Chaparro

According to our database, Pedro Chaparro authored at least 24 papers between 2004 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

CROB: Implementing a Large Instruction Window through Compression.

Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González

Trans. High Perform. Embed. Archit. Compil., 2011

Implementing End-to-End Register Data-Flow Continuous Self-Test.

Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González

IEEE Trans. Computers, 2011

Thread shuffling: combining DVFS and thread migration toreduce energy consumptions for multi-core systems.

Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Control-Flow Recovery Validation Using Microarchitectural Invariants.

Javier Carretero, Jaume Abella, Xavier Vera, Pedro Chaparro

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

2010

Microarchitectural Online Testing for Failure Detection in Memory Order Buffers.

Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella

IEEE Trans. Computers, 2010

Thread-management techniques to maximize efficiency in multicore and simultaneous multithreaded microprocessors.

Ryan N. Rakvic, Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González

ACM Trans. Archit. Code Optim., 2010

Energy efficiency via thread fusion and value reuse.

Ryan N. Rakvic, José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Antonio González

IET Comput. Digit. Tech., 2010

Virtual Distributed Simulation Platform for the Study and Optimization of Future Beyond 3G Heterogeneous Systems.

M. Carmen Lucas-Estan, Salvador Garrigas, Javier Gozálvez, José F. Monserrat, Julen Maneros, Fernando López, Ainara González, Imanol Aguado, Pedro Chaparro

Proceedings of the Mobile Lightweight Wireless Systems, 2010

High-Performance low-vcc in-order core.

Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

The split register file.

Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Low Vccmin fault-tolerant cache with highly predictable performance.

Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Dynamic thermal management using thin-film thermoelectric cooling.

Pedro Chaparro, José González, Qiong Cai, Greg Chrysler

Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

End-to-end register data-flow continuous self-test.

Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

Online error detection and correction of erratic bits in register files.

Xavier Vera, Jaume Abella, Javier Carretero, Pedro Chaparro, Antonio González

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

2008

On-line Failure Detection in Memory Order Buffers.

Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella

Proceedings of the 2008 IEEE International Test Conference, 2008

Thread fusion.

José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Ryan N. Rakvic, Antonio González

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

On-Line Failure Detection and Confinement in Caches.

Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

Issue system protection mechanisms.

Pedro Chaparro, Jaume Abella, Javier Carretero, Xavier Vera

Proceedings of the 26th International Conference on Computer Design, 2008

Meeting points: using thread criticality to adapt multicore hardware to parallel regions.

Qiong Cai, José González, Ryan N. Rakvic, Grigorios Magklis, Pedro Chaparro, Antonio González

Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008

2007

Understanding the Thermal Implications of Multi-Core Architectures.

Pedro Chaparro, José González, Grigorios Magklis, Qiong Cai, Antonio González

IEEE Trans. Parallel Distributed Syst., 2007

Building a large instruction window through ROB compression.

Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González

Proceedings of the 2007 workshop on MEmory performance, 2007

2006

Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture.

Grigorios Magklis, Pedro Chaparro, José González, Antonio González

Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

2005

Distributing the Frontend for Temperature Reduction.

Pedro Chaparro, Grigorios Magklis, José González, Antonio González

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

2004

Thermal-Aware Clustered Microarchitectures.

Pedro Chaparro, José González, Antonio González

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004