Pawel Swierczynski

Orcid: 0000-0002-8010-5149

Affiliations:
  • Ruhr University Bochum, Germany (PhD 2018)


According to our database1, Pawel Swierczynski authored at least 10 papers between 2013 and 2019.

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Timeline

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Bibliography

2019
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion.
IEEE Trans. Dependable Secur. Comput., 2019

Insights into the mind of a trojan designer: the challenge to integrate a trojan into the bitstream.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Bitstream-based attacks against reconfigurable hardware.
PhD thesis, 2018

Bitstream Fault Injections (BiFI)-Automated Fault Attacks Against SRAM-Based FPGAs.
IEEE Trans. Computers, 2018

2017
Interdiction in practice - Hardware Trojan against a high-security USB flash drive.
J. Cryptogr. Eng., 2017

2015
Physical Security Evaluation of the Bitstream Encryption Mechanism of Altera Stratix II and Stratix III FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2015

FPGA Trojans Through Detecting and Weakening of Cryptographic Primitives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Protecting against Cryptographic Trojans in FPGAs.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2013
Keccak und der SHA-2.
Datenschutz und Datensicherheit, 2013

Side-channel attacks on the bitstream encryption mechanism of Altera Stratix II: facilitating black-box analysis using software reverse-engineering.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013


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