Pawel Owczarczyk

According to our database, Pawel Owczarczyk authored at least 5 papers between 2015 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems.

Christopher J. Berry, David Wolpert, Christos Vezyrtzis, Richard F. Rizzolo, Sean M. Carey, Yaniv Maroz, Hunter F. Shi, Dureseti Chidambarrao, Christian Jacobi, Anthony Saporito, Thomas Strach, Alper Buyuktosunoglu, Preetham Lobo, Pierce Chuang, Pawel Owczarczyk, Ramon Bertran, Tobias Webel, Phillip J. Restle

IEEE J. Solid State Circuits, 2019

2018

The 24-Core POWER9 Processor With Adaptive Clocking, 25-Gb/s Accelerator Links, and 16-Gb/s PCIe Gen4.

Christopher J. Gonzalez, Michael S. Floyd, Eric Fluhr, Phillip J. Restle, Daniel Dreps, Michael A. Sperling, Rahul M. Rao, David Hogenmiller, Christos Vezyrtzis, Pierce Chuang, Daniel Lewis, Ricardo Escobar, Vinod Ramadurai, Ryan Kruse, Juergen Pille, Ryan Nett, Pawel Owczarczyk, Joshua Friedrich, Jose Paredes, Timothy Diemoz, Md. Saiful Islam, Donald W. Plass, Paul Muench

IEEE J. Solid State Circuits, 2018

Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor.

Christos Vezyrtzis, Thomas Strach, Pierce I-Jen Chuang, Preetham Lobo, Richard F. Rizzolo, Tobias Webel, Pawel Owczarczyk, Alper Buyuktosunoglu, Ramon Bertran, David T. Hui, Susan M. Eickhoff, Michael S. Floyd, Gerard Salem, Sean M. Carey, Stelios G. Tsapepas, Phillip J. Restle

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

26.5 Adaptive clocking in the POWER9™ processor for voltage droop protection.

Michael S. Floyd, Phillip J. Restle, Michael A. Sperling, Pawel Owczarczyk, Eric J. Fluhr, Joshua Friedrich, Paul Muench, Timothy Diemoz, Pierce Chuang, Christos Vezyrtzis

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015

Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths.

Xiaobin Yuan, Pawel Owczarczyk, Alan J. Drake, Marshall D. Tiner, David T. Hui, John P. Pennings, Francesco A. Campisano, Richard L. Willaman, Leana M. Cropp, Rudolph D. Dussault

IEEE Trans. Very Large Scale Integr. Syst., 2015