Pawel Chodowiec

According to our database, Pawel Chodowiec authored at least 8 papers between 2000 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

FPGA and ASIC Implementations of AES.

Kris Gaj, Pawel Chodowiec

Proceedings of the Cryptographic Engineering, 2009

2005

InvMixColumn decomposition and multilevel resource sharing in AES implementations.

Viktor Fischer, Milos Drutarovský, Pawel Chodowiec, F. Gramain

IEEE Trans. Very Large Scale Integr. Syst., 2005

2003

IPsec-Protected Transport of HDTV over IP.

Peter Bellows, Jaroslav Flidr, Ladan Gharai, Colin Perkins, Pawel Chodowiec, Kris Gaj

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Very Compact FPGA Implementation of the AES Algorithm.

Pawel Chodowiec, Kris Gaj

Proceedings of the Cryptographic Hardware and Embedded Systems, 2003

2001

Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board.

Pawel Chodowiec, Kris Gaj, Peter Bellows, Brian Schott

Proceedings of the Information Security, 4th International Conference, 2001

Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipelining.

Pawel Chodowiec, Po Khuon, Kris Gaj

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001

Fast Implementation and Fair Comparison of the Final Candidates for Advanced Encryption Standard Using Field Programmable Gate Arrays.

Kris Gaj, Pawel Chodowiec

Proceedings of the Topics in Cryptology, 2001

2000

Comparison of the Hardware Performance of the AES Candidates Using Reconfigurable Hardware.

Kris Gaj, Pawel Chodowiec

Proceedings of the Third Advanced Encryption Standard Candidate Conference, 2000