Paulo Moreira
According to our database1,
Paulo Moreira
authored at least 8 papers
between 1998 and 2020.
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Bibliography
2020
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit With High Speed Feed Forward Correction in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
2019
A High-resolution, Wide-range, Radiation-hard Clock Phase-shifter in a 65 nm CMOS Technology.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
2016
10-Gb/s Distributed Amplifier-Based VCSEL Driver IC With ESD Protection in 130-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter PLL with triple-modular redundant phase detector in 65 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2000
IEEE J. Solid State Circuits, 2000
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998