Paulo Da Cunha Possa

According to our database, Paulo Da Cunha Possa authored at least 7 papers between 2010 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

LP-P²IP: A Low-Power Version of P¹IP Architecture Using Partial Reconfiguration.

Álvaro Avelino, Valentin Obac Roda, Naim Harb, Carlos Valderrama, Glauberto Albuquerque, Paulo Da Cunha Possa

Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

2015

P²IP: A novel low-latency Programmable Pipeline Image Processor.

Paulo Da Cunha Possa, Naim Harb, Eva Dokládalová, Carlos Valderrama

Microprocess. Microsystems, 2015

2012

A new self-adapting architecture for feature detection.

Paulo Da Cunha Possa, Sidi Ahmed Mahmoudi, Naim Harb, Carlos Valderrama

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011

FPGA-based hardware acceleration: A CPU/accelerator interface exploration.

Paulo Da Cunha Possa, David Schaillie, Carlos Valderrama

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010

Image and video processing on FPGAs: An exploration framework for real-time applications.

Paulo Da Cunha Possa, Zied El Hadhri, Carlos Valderrama

Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

Convergence in reconfigurable embedded systems.

Carlos Valderrama, Laurent Jojczyk, Paulo Da Cunha Possa

Proceedings of the 17th IEEE International Conference on Electronics, 2010

Design of a low latency spectrum analyzer using the Goertzel Algorithm with a Network on Chip.

Laurent Jojczyk, Paulo Da Cunha Possa, Carlos Valderrama

Proceedings of the 17th IEEE International Conference on Electronics, 2010