Paulo César Comassetto de Aguirre

Orcid: 0000-0002-1824-5562

According to our database1, Paulo César Comassetto de Aguirre authored at least 17 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Variable Conversion Approach for Design Optimization of Low-Voltage Low-Pass Filters.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024

A Negative Resistance-Based ULV Variable-Gain OTA for Low-Power Applications.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

Voltage Coefficient of Resistance Effect in the Harmonic Distortion of Active-RC Continuous-Time Sigma-Delta Modulators.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

A 5-V 125-kHz Fourth-Order Continuous-Time Sigma-Delta Modulator in 130-nm BCD Technology.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

A Low-Voltage Low-Power 20-Msps 3-Bit Rail-to-Rail Flash ADC.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

A 5.8-GHz RF VCO-Based Sensing System with Integrated RF Energy Harvesting in CMOS 65-nm for Health Monitoring Applications.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

2023
Evaluation and Comparison of Offset Compensation Techniques for a Multi-Stage Comparator.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

A Fast Cold-Start Integrated System for Ultra-Low Voltage SC Energy-Harvesting Circuits.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

An RF-EH Employing Controlled-Impedance Matching for Ultra-Low Voltage Batteryless Devices.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022
High-Level Design of a 14-bit Continuous-Time Sigma-Delta Modulator with FIR DAC for Low-Voltage Audio Devices.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

An 8-Bit 4x4 Segmented Current-Steering DAC for Bipolar Biphasic Stimulators.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

2020
A 170.7-dB FoM-DR 0.45/0.6-V Inverter-Based Continuous-Time Sigma-Delta Modulator.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

2018
A 0.6-V, 74.2-dB DR Continuous-Time Sigma-Delta Modulator With Inverter-Based Amplifiers.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017
Low cost automatic test vector generation for structural analog testing.
Proceedings of the 18th IEEE Latin American Test Symposium, 2017

2016
A digitally tunable 4th-order Gm-C low-pass filter for multi-standards receivers.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

2015
A third-order 1 MHz continuous-time sigma-delta modulator in a 130 nm CMOS process.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

2013
Behavioral modeling of continuous-time ΣΔ modulators in matlab/simulink.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013


  Loading...