Paula López Martinez

Orcid: 0000-0002-8218-8945

Affiliations:
  • University of Santiago de Compostela, Spain


According to our database1, Paula López Martinez authored at least 73 papers between 1999 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Low-Voltage CMOS Capacitor-Less LDOs: Bulk-Driven Versus Gate-Driven Comparative Study.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

Global shutter CMOS vision sensors and event cameras for on-chip dynamic information.
Int. J. Circuit Theory Appl., June, 2024

Simultaneous Multifrequency Demodulation for Single-Shot Multiple-Path ToF Imaging.
IEEE Trans. Computational Imaging, 2024

Live Demonstration: 5-bit signed SRAM-based DNN CIM for Image Recognition.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Live Demonstration: A Mixed-Mode Signal CMOS Chip for Hyperdimensional Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023

Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting Systems.
Proceedings of the 19th International Conference on Synthesis, 2023

CDS Free Frame Differencing Event Vision Pixel with Lateral Overflow Capacitor for Dynamic Range Extension.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

GIPS: Geometry-Inspired Passive ToF Sensing for 3D Depth Reconstruction.
Proceedings of the 31st European Signal Processing Conference, 2023

Recent Advances in Computational Time-of-Flight Imaging.
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023

2022
An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

0.6-V-V<sub>IN</sub> 7.0-nA-I<sub>Q</sub> 0.75-mA-I<sub>L</sub> CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Low-cost mobile mapping system solution for traffic sign segmentation using Azure Kinect.
Int. J. Appl. Earth Obs. Geoinformation, 2022

A 2-Tap Macro-Pixel-Based Indirect ToF CMOS Image Sensor for Multi-Frequency Demodulation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

HDC8192: A General Purpose Mixed-Signal CMOS Architecture for Massively Parallel Hyperdimensional Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Passive 3D Time-of-Flight Imaging leveraging VLC Infrastructure.
Proceedings of the 2022 IEEE Sensors, Dallas, TX, USA, October 30 - Nov. 2, 2022, 2022

Live Demonstration: VLC-enabled Passive 3D Time-of-Flight Imaging.
Proceedings of the 2022 IEEE Sensors, Dallas, TX, USA, October 30 - Nov. 2, 2022, 2022

Fast Time-Domain Super-Resolution for Single-Shot Multi- Path ToF Imaging.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Low-Power Techniques on a CMOS Vision Sensor Chip for Event Generation by Frame Differencing with High Dynamic Range.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
HDR 4T-APS Pixel for Event Generation by Frame Differencing.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Proposal of a Single-Shot Multi-Frame Multi-Frequency CMOS ToF Sensor.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020
On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

All-hardware SIFT implementation for real-time VGA images feature extraction.
J. Real Time Image Process., 2020

1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A CMOS Vision Sensor for Background Subtraction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020


Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications.
IEEE Internet Things J., 2019

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology.
Int. J. Circuit Theory Appl., 2019

Time-of-Flight Pixel with Homodyne Phase Demodulation in Standard CMOS Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Live Demonstration: Deep Learning-Based Visual Tracking of Multiple Objects on a Low-Power Embedded System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm<sup>2</sup> Subthreshold Voltage Reference for Implantable Devices.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
Pulsed time-of-flight pixel with on-chip 20 klux background light suppression in standard CMOS technology.
Int. J. Circuit Theory Appl., 2018

In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors.
Int. J. Circuit Theory Appl., 2018

Low-Power Regulator for Micro Energy Harvesting Applications.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Shannon Entropy as Background Dynamics Estimator In Foreground Detector Algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018

Live Demonstration: Deep Learning-Based Multiple Object Detection and Tracking on a Low-Power Embedded System.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018

2017
Effect of temporal and spatial noise on the performance of hardware oriented background extraction algorithms.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

2016
Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting.
Int. J. Circuit Theory Appl., 2016

Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Live demonstration: Wireless sensor network for snail pest detection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Dynamic model of on-chip inverting capacitive charge pumps with charge reusing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Distance Measurement Error in Time-of-Flight Sensors Due to Shot Noise.
Sensors, 2015

Capacitance-based wireless sensor mote for snail pest detection.
Proceedings of the IEEE Sensors Applications Symposium, 2015

Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013
Voltage boosters for on-chip solar cells on focal-plane processors.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

CMOS photodiode model and HDL implementation.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012
A Verilog-AMS photodiode model including lateral effects.
Microelectron. J., 2012

Evidence of the lateral collection significance in small CMOS photodiodes.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Modeling and experimental results of short channel annular MOS transistors.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010
Analytical model for p-n junctions under point source illumination.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
A dc <i>I</i>-<i>V</i> model for short-channel polygonal enclosed-layout transistors.
Int. J. Circuit Theory Appl., 2009

Efficient software-hardware 3D heat equation solver with applications on the non-destructive evaluation of minefields.
Comput. Geosci., 2009

A study of CMOS radiation tolerant transistors using green functions.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008
FPGA-based hardware accelerator of the heat equation with applications on infrared thermography.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

2007
Soft-Hard 3D FD-TD Solver for Non Destructive Evaluation.
Proceedings of the FPL 2007, 2007

Improved Analytical I-V model for polygonal-shape enclosed layout transistors.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
FPGA Implementation of 3-D Thermal Model Simulator.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
Performance analysis of high-speed MOS transistors with different layout styles.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

FPGA Finite-Difference Time-Domain solver for thermal simulation.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Practical considerations on doughnut transistors design.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004
Improved thermal analysis of buried landmines.
IEEE Trans. Geosci. Remote. Sens., 2004

2002
Robustness oriented design tool for multilayer DTCNN applications.
Int. J. Circuit Theory Appl., 2002

2000
Antipersonnel mine detection on infrared images.
Proceedings of the University as a Bridge from Technology to Society: IEEE International Symposium on Technology and Society, 2000

Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Genetic Algorithm Based Training for Multilayer Discrete-Time Cellular Neural Networks.
Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999


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