Paul Six
According to our database1,
Paul Six
authored at least 15 papers
between 1986 and 1998.
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
1998
Techniques for Reducing the Number of Decisions and Backtracks in Combinational Test Generation.
J. Electron. Test., 1998
Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer.
Proceedings of the 35th Conference on Design Automation, 1998
1995
Proceedings of the Proceedings EURO-DAC'95, 1995
Proceedings of the Proceedings EURO-DAC'95, 1995
1993
Estimation of typical power of synchronous CMOS circuits using a hierarchy of simulators.
IEEE J. Solid State Circuits, January, 1993
1992
Flag/Condition Handling and Branch Assignment for Large Microcoded Controllers.
Proceedings of the Synthesis for Control Dominated Circuits, 1992
Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks.
Proceedings of the Synthesis for Control Dominated Circuits, 1992
1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
1990
Proceedings of the European Design Automation Conference, 1990
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990
1989
REDUSA: module generation by automatic elimination of superfluous blocks in regular structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
1988
Design of a process-tolerant cell library for regular structures using symbolic layout and hierarchical compaction.
IEEE J. Solid State Circuits, June, 1988
IEEE J. Solid State Circuits, June, 1988
1986
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986