Paul S. Zuchowski

According to our database1, Paul S. Zuchowski authored at least 9 papers between 1996 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
The Titanic: what went wrong!
Proceedings of the 42nd Design Automation Conference, 2005

Should our power approach be current?
Proceedings of the 42nd Design Automation Conference, 2005

2004
Process and environmental variation impacts on ASIC timing.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2003
Designing mega-ASICs in nanogate technologies.
Proceedings of the 40th Design Automation Conference, 2003

2002
Issues and strategies for the physical design of system-on-a-chip ASICs.
IBM J. Res. Dev., 2002

A hybrid ASIC and FPGA architecture.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Managing power and performance for System-on-Chip designs using Voltage Islands.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

1999
The first copper ASICs: A 12M-gate technology.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1996
Technology-migratable ASIC library design.
IBM J. Res. Dev., 1996


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