Paul Reed

According to our database1, Paul Reed authored at least 10 papers between 1986 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2008
Implications of device timing variability on full chip timing.
Proceedings of the 2008 International Symposium on Physical Design, 2008

2006
Die Stacking (3D) Microarchitecture.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2003
An Oberon Linker for an Imperfect World - More Notes on Building Your Own Tools.
Proceedings of the Modular Programming Languages, Joint Modular Languages Conference, 2003

2000
Building Your Own Tools: An Oberon Industrial Case-Study.
Proceedings of the Modular Programming Languages, Joint Modular Languages Conference, 2000

A Publishing System for Efficiently Creating Dynamic Web Content.
Proceedings of the Proceedings IEEE INFOCOM 2000, 2000

1997
A 250-MHz 5-W PowerPC microprocessor with on-chip L2 cache controller.
IEEE J. Solid State Circuits, 1997

1994
ANSI/HFES software user interface standardization: critical issues.
ACM SIGCHI Bull., 1994

1992
Experiences in Implementing Ada 9X Protected Records and Requeue.
Proceedings of the Conference Proceedings on TRI-Ada 1992, 1992

1988
A Brief Summary of the Background and current Status of the HFS Human-Computer Interaction Standards Committee.
ACM SIGCHI Bull., 1988

1986
Usability testing in the real world.
Proceedings of the SIGCHI Conference on Human Factors in Computing Systems, 1986


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