Paul Pop
Orcid: 0000-0001-9981-1775
According to our database1,
Paul Pop
authored at least 138 papers
between 1998 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
-
on id.loc.gov
-
on d-nb.info
On csauthors.net:
Bibliography
2024
J. Syst. Archit., 2024
2023
Real Time Syst., December, 2023
Int. J. Netw. Manag., 2023
Mapping and Integration of Event- and Time-triggered Real-time Tasks on Partitioned Multi-core Systems.
Proceedings of the 28th IEEE International Conference on Emerging Technologies and Factory Automation, 2023
The FORA European Training Network on Fog Computing for Robotics and Industrial Automation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Special Session: Digital Technologies for Sustainability - Research Challenges and Opportunities.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023
2022
Quantitative Performance Comparison of Various Traffic Shapers in Time-Sensitive Networking.
IEEE Trans. Netw. Serv. Manag., 2022
Extensibility-aware Fog Computing Platform configuration for mixed-criticality applications.
J. Syst. Archit., 2022
IET Cyper-Phys. Syst.: Theory & Appl., 2022
Configuration and Evaluation of Multi-CQF Shapers in IEEE 802.1 Time-Sensitive Networking (TSN).
IEEE Access, 2022
Proceedings of the RTNS 2022: The 30th International Conference on Real-Time Networks and Systems, Paris, France, June 7, 2022
Latency-Aware Function Placement, Routing, and Scheduling in TSN-based Industrial Networks.
Proceedings of the IEEE International Conference on Communications, 2022
Proceedings of the 18th International Conference on Distributed Computing in Sensor Systems, 2022
2021
Latency Analysis of Multiple Classes of AVB Traffic in TSN With Standard Credit Behavior Using Network Calculus.
IEEE Trans. Ind. Electron., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Improving Latency Analysis for Flexible Window-Based GCL Scheduling in TSN Networks by Integration of Consecutive Nodes Offsets.
IEEE Internet Things J., 2021
Frontiers Robotics AI, 2021
Real-Time Guarantees for Critical Traffic in IEEE 802.1Qbv TSN Networks with Unscheduled and Unsynchronized End-Systems.
CoRR, 2021
Communication Scheduling for Control Performance in TSN-Based Fog Computing Platforms.
IEEE Access, 2021
Proceedings of the 7th IEEE International Conference on Network Softwarization, 2021
Scheduling Real-Time Applications on Edge Computing Platforms with Remote Attestation for Security.
Proceedings of the 6th IEEE/ACM Symposium on Edge Computing, 2021
2020
ACM Trans. Cyber Phys. Syst., 2020
IET Cyper-Phys. Syst.: Theory & Appl., 2020
Performance Optimization of Control Applications on Fog Computing Platforms Using Scheduling and Isolation.
IEEE Access, 2020
Proceedings of the 16th IEEE International Conference on Factory Communication Systems, 2020
Work-In-Progress: Safe and Secure Configuration Synthesis for TSN using Constraint Programming.
Proceedings of the 41st IEEE Real-Time Systems Symposium, 2020
Proceedings of the 4th IEEE International Conference on Fog and Edge Computing, 2020
Quality-Of-Control-Aware Scheduling of Communication in TSN-Based Fog Computing Platforms Using Constraint Programming.
Proceedings of the 2nd Workshop on Fog Computing and the IoT, 2020
Mapping and Scheduling Automotive Applications on ADAS Platforms using Metaheuristics.
Proceedings of the 25th IEEE International Conference on Emerging Technologies and Factory Automation, 2020
Proceedings of the 25th IEEE International Conference on Emerging Technologies and Factory Automation, 2020
Proceedings of the 2020 IEEE International Conference on Edge Computing, 2020
2019
IEEE Access, 2019
Proceedings of the 2019 IEEE International Systems Conference, 2019
Towards quality-of-control-aware scheduling of industrial applications on fog computing platforms.
Proceedings of the Workshop on Fog Computing and the IoT, 2019
Proceedings of the 24th IEEE European Test Symposium, 2019
2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Enabling Fog Computing for Industrial Automation Through Time-Sensitive Networking (TSN).
IEEE Commun. Stand. Mag., 2018
Worst-Case Latency Analysis for IEEE 802.1Qbv Time Sensitive Networks Using Network Calculus.
IEEE Access, 2018
IEEE Access, 2018
Scheduling in time sensitive networks (TSN) for mixed-criticality industrial applications.
Proceedings of the 14th IEEE International Workshop on Factory Communication Systems, 2018
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2018
Proceedings of the 17th Annual Mediterranean Ad Hoc Networking Workshop, 2018
2017
Performance Improvements and Congestion Reduction for Routing-Based Synthesis for Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Real Time Syst., 2017
Safe cooperating cyber-physical systems using wireless communication: The SafeCOP approach.
Microprocess. Microsystems, 2017
Design optimization for security- and safety-critical distributed real-time applications.
Microprocess. Microsystems, 2017
Proceedings of the 25th International Conference on Real-Time Networks and Systems, 2017
Runtime reconfiguration of time-sensitive networking (TSN) schedules for Fog Computing.
Proceedings of the IEEE Fog World Congress, 2017
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Fast architecture-level synthesis of fault-tolerant flow-based microfluidic biochips.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Transport or Store?: Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage.
Proceedings of the 54th Annual Design Automation Conference, 2017
Towards industry strength mapping of AUTOSAR automotive functionality on multicore architectures: work-in-progress.
Proceedings of the 2017 International Conference on Compilers, 2017
2016
Synthesis of Application-Specific Fault-Tolerant Digital Microfluidic Biochip Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
SIGBED Rev., 2016
Design optimisation of cyber-physical distributed systems using IEEE time-sensitive networks.
IET Cyper-Phys. Syst.: Theory & Appl., 2016
The SafeCOP ECSEL Project: Safe Cooperating Cyber-Physical Systems Using Wireless Communication.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
ACM Trans. Embed. Comput. Syst., 2015
Real Time Syst., 2015
Integr., 2015
Synthesis of biochemical applications on digital microfluidic biochips with operation execution time variability.
Integr., 2015
IEEE Des. Test, 2015
Des. Autom. Embed. Syst., 2015
Timing Analysis of Rate Constrained Traffic for the TTEthernet Communication Protocol.
Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015
Microfluidic very large-scale integration for biochips: Technology, testing and fault-tolerant design.
Proceedings of the 20th IEEE European Test Symposium, 2015
2014
Proceedings of the 20th IEEE Pacific Rim International Symposium on Dependable Computing, 2014
Online synthesis for operation execution time variability on digital microfluidic biochips.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Proceedings of the 2014 IEEE Emerging Technology and Factory Automation, 2014
2013
Microprocess. Microsystems, 2013
Module-Based Synthesis of Digital Microfluidic Biochips with Droplet-Aware Operation Execution.
ACM J. Emerg. Technol. Comput. Syst., 2013
Tutorial: Digital microfluidic biochips: Towards hardware/software co-design and cyber-physical system integration.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013
Multi-ASIP platform synthesis for Event-Triggered applications with cost/performance trade-offs.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013
Proceedings of the 2nd Mediterranean Conference on Embedded Computing, 2013
A network-flow based valve-switching aware binding algorithm for flow-based microfluidic biochips.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
Application-specific fault-tolerant architecture synthesis for digital microfluidic biochips.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Scheduling and Optimization of Fault-Tolerant Embedded Systems with Transparency/Performance Trade-Offs.
ACM Trans. Embed. Comput. Syst., 2012
Des. Autom. Embed. Syst., 2012
SAFCM: A Security-Aware Feedback Control Mechanism for Distributed Real-Time Embedded Systems.
Proceedings of the 2012 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2012
Timing analysis of mixed-criticality hard real-time applications implemented on distributed partitioned architectures.
Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation, 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Robust and flexible mapping for real-time distributed applications during the early design phases.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
Proceedings of the 15th International Conference on Compilers, 2012
2011
Recent research and emerging challenges in the System-Level Design of digital microfluidic biochips.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Design Optimization of Mixed-Criticality Real-Time Applications on Cost-Constrained Partitioned Architectures.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011
Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011
Optimization of Time-Partitions for Mixed-Criticality Real-Time Distributed Embedded Systems.
Proceedings of the 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2011
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
Digital microfluidic biochips: functional diversity, more than moore, and cyberphysical systems.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
Proceedings of the 14th International Conference on Compilers, 2011
Energy/reliability trade-offs in fault-tolerant event-triggered distributed embedded systems.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Application-aware optimization of redundant resources for the reconfigurable self-healing eDNA hardware architecture.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
Tabu search-based synthesis of digital microfluidic biochips with dynamically reconfigurable non-rectangular devices.
Des. Autom. Embed. Syst., 2010
Task Mapping and Bandwidth Reservation for Mixed Hard/Soft Fault-Tolerant Embedded Systems.
Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010
2009
Design Optimization of Time- and Cost-Constrained Fault-Tolerant Embedded Systems With Checkpointing and Replication.
IEEE Trans. Very Large Scale Integr. Syst., 2009
SIGBED Rev., 2009
Analysis and optimization of fault-tolerant embedded systems with hardened processors.
Proceedings of the Design, Automation and Test in Europe, 2009
Tabu search-based synthesis of dynamically reconfigurable digital microfluidic biochips.
Proceedings of the 2009 International Conference on Compilers, 2009
2008
Analysis and Optimisation of Hierarchically Scheduled Multiprocessor Embedded Systems.
Int. J. Parallel Program., 2008
Synthesis of Flexible Fault-Tolerant Schedules with Preemption for Mixed Soft and Hard Real-Time Systems.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
A constraint logic programming framework for the synthesis of fault-tolerant schedules for distributed embedded systems.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007
2006
ACM Trans. Design Autom. Electr. Syst., 2006
Mapping of Fault-Tolerant Applications with Transparency on Distributed Embedded Systems*.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Proceedings of the Third IEEE International Workshop on Electronic Design, 2006
Synthesis of fault-tolerant schedules with transparency/performance trade-offs for distributed embedded systems.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
ACM Trans. Embed. Comput. Syst., 2005
Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 2005
Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems.
Proceedings of the 2005 Design, 2005
Proceedings of the Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems, 2005
2004
Scheduling and mapping in an incremental design methodology for distributed real-time embedded systems.
IEEE Trans. Very Large Scale Integr. Syst., 2004
Real Time Syst., 2004
Proceedings of the 16th Euromicro Conference on Real-Time Systems (ECRTS 2004), 30 June, 2004
Proceedings of the 2004 Design, 2004
Springer, ISBN: 978-1-4020-2872-4, 2004
2003
Proceedings of the 2003 Conference on Languages, 2003
Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems.
Proceedings of the 2003 Design, 2003
2001
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
Proceedings of the 12th Euromicro Conference on Real-Time Systems (ECRTS 2000), 2000
Bus Access Optimization for Distributed Embedded Systems Based on Schedulability Analysis.
Proceedings of the 2000 Design, 2000
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000
1999
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999
1998
Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems.
Proceedings of the 24th EUROMICRO '98 Conference, 1998
Proceedings of the 1998 Design, 1998