Paul P. Sotiriadis

Orcid: 0000-0001-6030-4645

Affiliations:
  • National Technical University of Athens, Greece
  • Johns Hopkins University, Baltimore, MD, USA (former)
  • Massachusetts Institute of Technology, Cambridge, MA, USA (former)


According to our database1, Paul P. Sotiriadis authored at least 123 papers between 2000 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Power-Efficient Analog Hardware Architecture of the Learning Vector Quantization Algorithm for Brain Tumor Classification.
IEEE Trans. Very Large Scale Integr. Syst., November, 2024

A Radar-Based System for Detection of Human Fall Utilizing Analog Hardware Architectures of Decision Tree Model.
IEEE Open J. Circuits Syst., 2024

Advances in Electrical Impedance Tomography Inverse Problem Solution Methods: From Traditional Regularization to Deep Learning.
IEEE Access, 2024

A Robot Execution Failures Classification System Based on Analog IC Neural Networks.
Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024

Low-Power Single-Stage Programmable CMOS LNA for Ku-Band Applications.
Proceedings of the 13th International Conference on Modern Circuits and Systems Technologies, 2024

A Memristor-Equivalent Analog Integrated Neural Network for Air Quality Classification.
Proceedings of the 13th International Conference on Modern Circuits and Systems Technologies, 2024

An Analog Classifier for Liver Disorders based on Centroid Machine Learning Model.
Proceedings of the 13th International Conference on Modern Circuits and Systems Technologies, 2024

A Moment-Based Weighted Block Sparse Bayesian Learning Approach for Simultaneous Dual-Layer Lung Electrical Impedance Tomography.
Proceedings of the IEEE International Symposium on Biomedical Imaging, 2024

A Precise, Power-Efficient, Analog-Hardware Edge Detector for Biomedical Imaging.
Proceedings of the IEEE International Symposium on Biomedical Imaging, 2024

An Analog Neural Network for Estimating Sea State or Wave Height from Inertial Sensor Data.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
A Markov Chain Framework for Modeling the Statistical Properties of Stochastic Computing Finite-State Machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

A Stochastic Computing Sigma-Delta Adder Architecture for Efficient Neural Network Design.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

Guest Editorial Unconventional Computing Techniques for Emerging Technology Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

A Class of Inertial Measurement Units for Low-Noise Angular Velocity Estimation.
IEEE Trans. Instrum. Meas., 2023

A Low-Power Analog Integrated Implementation of the Support Vector Machine Algorithm with On-Chip Learning Tested on a Bearing Fault Application.
Sensors, 2023

Class-CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture.
IEEE Open J. Circuits Syst., 2023

MAGINAV: Long-Term Accurate Navigation Algorithm Using Inertial and Magnetic Field Sensor Fusion.
IEEE Access, 2023

An Area-Efficient, Analog Integrated Image Edge Detector based on the Robert's Cross Operator.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

Time-based Memristor Crossbar Array Programming for Stochastic Computing Parallel Sequence Generation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Low-Power Analog Integrated Deep Spatio-Temporal Inference Network with Application to Digit Classification.
Proceedings of the International Conference on Microelectronics, 2023

A Low-Power Analog Integrated Gaussian-based Neural Network Classifier with Application to Hepatitis Disease Recognition.
Proceedings of the International Conference on Microelectronics, 2023

An Analog Integrated, Low-Power, Area-Efficient, Gilbert, Modulo-based Classifier with Application to Lung-Cancer Classification.
Proceedings of the International Conference on Microelectronics, 2023

2022
Modeling a Stochastic Computing Nonscaling Adder and its Application in Image Sharpening.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

LoCoMOBO: A Local Constrained Multiobjective Bayesian Optimization for Analog Circuit Sizing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

An Efficient Point-Matching Method-of-Moments for 2D and 3D Electrical Impedance Tomography Using Radial Basis Functions.
IEEE Trans. Biomed. Eng., 2022

Gaussian Mixture Model classifier analog integrated low-power implementation with applications in fault management detection.
Microelectron. J., 2022

Compact MAX and MIN Stochastic Computing architectures.
Integr., 2022

Mixed-Variable Bayesian Optimization for Analog Circuit Sizing using Variational Autoencoders.
Proceedings of the 18th International Conference on Synthesis, 2022

Improving Gyroscope's Noise Performance By Embedding it in a Closed-Loop Involving Multiple Accelerometers.
Proceedings of the 11th International Conference on Modern Circuits and Systems Technologies, 2022

An Analog, Low-Power Threshold Classifier tested on a Bank Note Authentication Dataset.
Proceedings of the International Conference on Microelectronics, 2022

Electrical Impedance Tomography using a Weighted Bound-Optimization Block Sparse Bayesian Learning Approach.
Proceedings of the 22nd IEEE International Conference on Bioinformatics and Bioengineering, 2022

2021
Stochastic Computing Max & Min Architectures Using Markov Chains: Design, Analysis, and Implementation.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Nonscaling Adders and Subtracters for Stochastic Computing Using Markov Chains.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A Single-Step Method for Accelerometer and Magnetometer Axes Alignment.
IEEE Trans. Instrum. Meas., 2021

Accurate Analytical Accelerometer-Magnetometer Axes Alignment Guaranteeing Exact Orthogonality.
IEEE Trans. Instrum. Meas., 2021

RF Switched-Capacitor Power Amplifier Modeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A General Time-Domain Method for Harmonic Distortion Estimation in CMOS Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Magnetic Field Sensors' Calibration: Algorithms' Overview and Comparison.
Sensors, 2021

An intermodulation distortion estimation method for linear CMOS circuits.
Int. J. Circuit Theory Appl., 2021

An Optimization-Based Approach for Analog Circuit Technology Migration.
Proceedings of the 6th South-East Europe Design Automation, 2021

Exploring the Effectiveness of Sigma-Delta Modulators in Stochastic Computing-Based FIR Filtering.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

Multi-Objective Optimization Methods for CMOS LC-VCO Design.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

Time-Near-Optimal Longitudinal Control for Quadrotor UAVs.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

Ultra-Low Power, Low-Voltage, Fully-Tunable, Bulk-Controlled Bump Circuit.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

Analog and RF Circuit Constrained Optimization Using Multi-Objective Evolutionary Algorithms.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

An Analog Bayesian Classifier Implementation, for Thyroid Disease Detection, based on a Low-Power, Current-Mode Gaussian Function Circuit.
Proceedings of the International Conference on Microelectronics, 2021

Local Bayesian Optimization For Analog Circuit Sizing.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Fractional-Order Instrumentation Amplifier Transfer Function for Control Applications.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Deterministic Finite State Machines for Stochastic Division in Unipolar Format.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Exploring the Importance of Sensors' Calibration in Inertial Navigation Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Accurate Harmonic Distortion Estimation in CMOS Circuits using a Cross-Product Gm-Stage Modeling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Analogue Realization of a Fully Tunable Fractional-Order PID Controller for a DC Motor.
Proceedings of the 32nd International Conference on Microelectronics, 2020

Analogue Realization of Fractional-Order Healthy and Cancerous Lung Cell Models for Electrical Impedance Spectroscopy.
Proceedings of the 32nd International Conference on Microelectronics, 2020

SPICE and MATLAB simulation and evaluation of Electrical Impedance Tomography readout chain using phantom equivalents.
Proceedings of the European Conference on Circuit Theory and Design, 2020

Implementation of Fractional-order Model of Nickel-Cadmium Cell using Current Feedback Operational Amplifiers.
Proceedings of the European Conference on Circuit Theory and Design, 2020

A highly tunable dynamic thoracic model for Electrical Impedance Tomography.
Proceedings of the 20th IEEE International Conference on Bioinformatics and Bioengineering, 2020

2019
Design of a sub-1V CMOS reference voltage generator.
Microelectron. J., 2019

Introducing Senior Undergraduate Students to the Open-Circuit Time-Constant Method for Circuit Analysis.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

A New Technique for Stochastic Division in Unipolar Format.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

A 0.6V, 700nW Chopper Capacitively-Coupled Instrumentation Amplifier for Biomedical Applications.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Computationally Efficient Calibration Algorithm for Three-Axis Accelerometer and Magnetometer.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Electrical Impedance Tomography Image Reconstruction: Impact of Hardware Noise and Errors.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

2018
Hardware optimization methodology of multi-step look-ahead sigma-delta modulators.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Electrical impedance tomography image reconstruction for adjacent and opposite strategy using FEMM and EIDORS simulation models.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

An Efficient Hardware Architecture for the Implementation of Multi-Step Look-Ahead Sigma-Delta Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Comparison of Recently Developed Single-Bit All-Digital Frequency Synthesizers in Terms of Hardware Complexity and Performance.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A Class of 1-Bit Multi-Step Look-Ahead Σ-Δ Modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Derivation of the transfer functions of 1-bit Multi-Step Look-Ahead ΣΔ modulators using system identification methods.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

All-digital single-bit-output RF transmitters using homodyne sigma-delta modulation.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

Closed-loop current-feedback, signal-chopped, low noise AMR sensor with high linearity.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

Development of a modular 64-electrodes Electrical Impedance Tomography system.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

A 1.8V CMOS chopper four-quadrant analog multiplier.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

The class of 1-bit Multi-Step Look-Ahead ΣΔ modulators and their applications.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

Single-bit all digital frequency synthesis with homodyne sigma-delta modulation for Internet of Things applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Spurs-Free Single-Bit-Output All-Digital Frequency Synthesizers With Forward and Feedback Spurs and Noise Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

2015
Spurs-free single-bit-output frequency synthesizers for fully-digital RF transmitters.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Single-Bit Digital Frequency Synthesis via Dithered Nyquist-Rate Sinewave Quantization.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A mathematical model for time-domain analysis and for parametric optimization of a class of switched capacitor RF power amplifiers.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2012
Direct All-Digital Frequency Synthesis Techniques, Spurs Suppression, and Deterministic Jitter Correction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
A Nearly All-Digital Frequency Mixer Based on Nonlinear Digital-to-Analog Conversion and Intermodulation Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Spurs suppression and deterministic jitter correction in all-digital frequency synthesizers, current state and future directions.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Design of a 1.2-V 60 GHz transceiver in a 90nm CMOS RF technology.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
Theory of Flying-Adder Frequency Synthesizers - Part II: Time- and Frequency-Domain Properties of the Output Signal.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Theory of Flying-Adder Frequency Synthesizers - Part I: Modeling, Signals' Periods and Output Average Frequency.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A SiGe BiCMOS Eight-Channel Multidithering Sub-Microsecond Adaptive Controller.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Optimizing continuous-time filters driven by bang-bang signals.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

All-digital frequency and clock synthesis architectures from a signals and systems perspective, current state and future directions.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Channels that heat up.
IEEE Trans. Inf. Theory, 2009

Continuous-time Signal Processing with Time-variant Delay.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Mixed Signal Frequency Mixers with Intermodulation Product Cancellation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
Cascaded Diophantine Frequency Synthesis.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Diophantine Frequency Synthesis for Fast-Hopping, High-Resolution Frequency Synthesizers.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

7-decades tunable translinear SiGe BiCMOS 3-phase sinusoidal oscillator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Adaptive delay compensation in multi-dithering adaptive control.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

High-speed adaptive RF phased array.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Fast State-Space Harmonic-Distortion Estimation in Weakly Nonlinear G<sub>m</sub>-C Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A State-Space Approach to Intermodulation Distortion Estimation in Fully Balanced Bandpass G<sub>m</sub> - C Filters With Weak Nonlinearities.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A Hot Channel
CoRR, 2007

High-speed, model-free adaptive control using parallel synchronous detection.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

A Channel that Heats Up.
Proceedings of the IEEE International Symposium on Information Theory, 2007

Diophantine Frequency Synthesis The Mathematical Principles.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

An Information Theory Approach to Power - Optimal Trafic Routing in Networks on Chips.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Multi-Channel Coherent Detection for Delay-Insensitive Model-Free Adaptive Control.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A New RF Radiometer for Absolute Noninvasive Temperature Sensing in Biomedical Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Information Capacity of Nanowire Crossbar Switching Networks.
IEEE Trans. Inf. Theory, 2006

State-space harmonic distortion modeling in weakly nonlinear, fully balanced G<sub>m</sub>-C filters-a modular approach resulting in closed-form solutions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A Quadrature Sinusoidal Oscillator With Phase-Preserving Wide-Range Linear Frequency Tunability and Frequency-Independent Amplitude.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Absolute Temperature Monitoring Using RF Radiometry in the MRI Scanner.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Nanoscale Data Storage Devices Capacity and Encoding Schemes.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

A fast state-space algorithm to estimate harmonic distortion in fully differential weakly nonlinear G<sub>m</sub>-C filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A robust continuous-time multi-dithering technique for laser communications using adaptive optics.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A quadrature sinusoidal oscillator with phase-preserving linear frequency control and independent static amplitude control.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Rapid intermodulation distortion estimation in fully balanced weakly nonlinear Gm-C filters using state-space modeling.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2003
Energy reduction in VLSI computation modules: an information-theoretic approach.
IEEE Trans. Inf. Theory, 2003

Information storage capacity of crossbar switching networks.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2002
Interconnect modeling and optimization in deep sub-micron technologies.
PhD thesis, 2002

A bus energy model for deep submicron technology.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Power Estimation and Power Optimal Communication in Deep Submicron Buses: Analytical Models and Statistical Measures.
J. Circuits Syst. Comput., 2002

Maximum achievable energy reduction using coding with applications to deep sub-micron buses.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Analysis and implementation of charge recycling for deep sub-micron buses.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Reducing bus delay in submicron technology using coding.
Proceedings of ASP-DAC 2001, 2001

2000
Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Low power bus coding techniques considering inter-wire capacitances.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000


  Loading...