Paul J. Thadikaran

According to our database, Paul J. Thadikaran authored at least 18 papers between 1993 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Design for Manufacturability and Reliability in Nano Era.

Goutam Debnath, Paul J. Thadikaran

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2006

Extraction error modeling and automated model debugging in high-performance custom designs.

Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman

IEEE Trans. Very Large Scale Integr. Syst., 2006

Design Challenges for High Performance Nano-Technology.

Goutam Debnath, Paul J. Thadikaran

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005

Efficient techniques for transition testing.

Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran

ACM Trans. Design Autom. Electr. Syst., 2005

Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs.

Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman

Proceedings of the 2005 Design, 2005

2004

Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application.

Debashis Nayak, Srikanth Venkataraman, Paul J. Thadikaran

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

2003

Efficient Transition Fault ATPG Algorithms Based on Stuck-At Test Vectors.

Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran

J. Electron. Test., 2003

Extraction Error Analysis, Diagnosis and Correction in Custom-Made High-Performance Designs.

Yu-Shen Yang, Jiang Brandon Liu, Paul J. Thadikaran, Andreas G. Veneris

Proceedings of the Fourth International Workshop on Microprocessor Test and Verification, 2003

Extraction Error Diagnosis and Correction in High-Performance Designs.

Yu-Shen Yang, Jiang Brandon Liu, Paul J. Thadikaran, Andreas G. Veneris

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002

Techniques to Reduce Data Volume and Application Time for Transition Test.

Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Novel ATPG algorithms for transition faults.

Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran

Proceedings of the 7th European Test Workshop, 2002

1997

Algorithms to compute bridging fault coverage of <i>I_DDQ</i> test sets.

Paul J. Thadikaran, Sreejit Chakravarty, Janak H. Patel

ACM Trans. Design Autom. Electr. Syst., 1997

1996

Simulation and Generation of IDDQ Tests for Bridging Faults in Combinational Circuits.

Sreejit Chakravarty, Paul J. Thadikaran

IEEE Trans. Computers, 1996

Algorithms to select <i>I</i>_DDQ measurement points to detect bridging faults.

Sreejit Chakravarty, Paul J. Thadikaran

J. Electron. Test., 1996

Fast Algorithms for Computer IDDQ Tests for Combination Circuits.

Paul J. Thadikaran, Sreejit Chakravarty

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

1995

Fault Simulation of<i>I_DDQ</i> Tests for Bridging Faults in Sequential Circuits.

Paul J. Thadikaran, Sreejit Chakravarty, Janak H. Patel

Proceedings of the Digest of Papers: FTCS-25, 1995

1994

A Study of I_DDQ Subset Selection Algorithms for Bridging Faults.

Sreejit Chakravarty, Paul J. Thadikaran

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993

Simulation and generation of I_DDQ tests for bridging faults in combinational circuits.

Sreejit Chakravarty, Paul J. Thadikaran

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993