Paul J. Jackson

Affiliations:
  • Princeton University, Electrical Engineering Department, NJ, USA


According to our database1, Paul J. Jackson authored at least 7 papers between 1999 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

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Bibliography

2023
DECADES: A 67mm<sup>2</sup>, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

CIFER: A 12nm, 16mm<sup>2</sup>, 22-Core SoC with a 1541 LUT6/mm<sup>2</sup> 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2020
OpenPiton at 5: A Nexus for Open and Agile Hardware Design.
IEEE Micro, 2020

2018
Power and Energy Characterization of an Open Source 25-Core Manycore Processor.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017
Architectural tradeoffs for biodegradable computing.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

2015
Networks in a Digital World: A Cybernetics Perspective.
Proceedings of the 23rd European Conference on Information Systems, 2015

1999
Organizational change and virtual teams: strategic and operational integration.
Inf. Syst. J., 1999


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