Paul J. Hurst

According to our database, Paul J. Hurst authored at least 76 papers between 1988 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A Time-Interleaved SAR ADC With Signal-Independent Background Timing Calibration.

Christopher K. Su, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2020

A Two-Step ADC With Statistical Calibration.

Yi-Long Yu, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2019

Digital Background Calibration of a Split Current-Steering DAC.

David J. Stoops, Jenny Kuo, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018

Design of a Wideband Bandpass Stacked HBT Distributed Amplifier in InP.

Natalie S. Killeen, Duy P. Nguyen, Alexander N. Stameroff, Anh-Vu Pham, Paul J. Hurst

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2016

Iterative Gain Enhancement in an Algorithmic ADC.

Timothy A. Monk, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

An algorithmic ADC with greater than rail-to-rail input range and near-Vt supply.

Mo M. Zhang, Paul J. Hurst, Stephen H. Lewis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

An Integrator-Based Pipelined ADC With Digital Calibration.

Dong Wang, John P. Keane, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. II Express Briefs, 2015

2014

Background Adaptive Cancellation of Digital Switching Noise in a Pipelined Analog-to-Digital Converter Without Noise Sensors.

Nick C.-J. Chang, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

IEEE J. Solid State Circuits, 2014

2013

Immediate Calibration of Operational Amplifier Gain Error in Pipelined ADCs Using Extended Correlated Double Sampling.

Omar A. Hafiz, Xiaoyue Wang, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2013

2012

Canceling the ISI Due to Finite S/H Bandwidth in a Circular Buffer Forward Equalizer.

Nattapol Sitthimahachaikul, Lakshmi P. Rao, Paul J. Hurst

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Overcoming the Effect of the Summation-Node Parasitic Pole in an Analog Equalizer.

Nattapol Sitthimahachaikul, Lakshmi P. Rao, Paul J. Hurst

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Correcting the Effects of Mismatches in Time-Interleaved Analog Adaptive FIR Equalizers.

Lakshmi P. Rao, Nattapol Sitthimahachaikul, Paul J. Hurst

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A Pipelined ADC With Metastability Error Rate <10^-15 Errors/Sample.

Shankar Guhados, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2012

Background adaptive cancellation of digital switching noise in pipelined ADCs without noise sensors.

Nick C.-J. Chang, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011

A Digitally Corrected 5-mW 2-MS/s SC Delta Sigma ADC in 0.25- μ m CMOS With 94-dB SFDR.

Kerry A. O'Donoghue, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2011

2010

A Four-Channel Time-Interleaved ADC With Digital Calibration of Interchannel Timing and Memory Errors.

Chi Ho Law, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2010

Highly programmable switched-capacitor filters using biquads with nonuniform internal clocks.

Oliver E. Gysel, Paul J. Hurst, Stephen H. Lewis

Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Calibration of pipelined ADC gain and memory errors in an adaptively equalized receiver.

Mo M. Zhang, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A parametric polyphase domain approach to blind calibration of timing mismatches for M-channel time-interleaved ADCs.

Patrick Satarzadeh, Bernard C. Levy, Paul J. Hurst

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A digitally calibrated 5-mW 2-MS/s 4th-order ΔΣ ADC in 0.25-μm CMOS with 94 dB SFDR.

Kerry A. O'Donoghue, Paul J. Hurst, Stephen H. Lewis

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009

Gain-Error Calibration of a Pipelined ADC in an Adaptively Equalized Baseband Receiver.

Mo M. Zhang, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

IEEE Trans. Circuits Syst. II Express Briefs, 2009

A Level-Crossing Analog-to-Digital Converter With Triangular Dither.

Tunde Wang, Dong Wang, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Correction of Mismatches in a Time-Interleaved Analog-to-Digital Converter in an Adaptively Equalized Digital Communication Receiver.

Tsung-Heng Tsai, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Adaptive Semiblind Calibration of Bandwidth Mismatch for Two-Channel Time-Interleaved ADCs.

Patrick Satarzadeh, Bernard C. Levy, Paul J. Hurst

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Digital Calibration of a Nonlinear S/H.

Patrick Satarzadeh, Bernard C. Levy, Paul J. Hurst

IEEE J. Sel. Top. Signal Process., 2009

Nested Digital Background Calibration of a 12-bit Pipelined ADC Without an Input SHA.

Haoyue Wang, Xiaoyue Wang, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2009

A Full-Wave Rectifier With Integrated Peak Selection for Multiple Electrode Piezoelectric Energy Harvesters.

Nathaniel J. Guilar, Rajeevan Amirtharajah, Paul J. Hurst

IEEE J. Solid State Circuits, 2009

An energy-aware multiple-input power supply with charge recovery for energy harvesting applications.

Nathaniel J. Guilar, Rajeevan Amirtharajah, Paul J. Hurst, Stephen H. Lewis

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008

DAC Quantization-Noise Cancellation in an Echo-Canceling Transceiver.

Paul J. Hurst, Andy Norrell

IEEE Trans. Circuits Syst. II Express Briefs, 2008

A Programmable Impedance Matching Circuit for Voiceband Modems.

Russell A. Hershbarger, Wenyan Jia, Kiam M. Tey, Kiyoshi Fukahori, Paul J. Hurst, Manprit Kapoor

IEEE J. Solid State Circuits, 2008

A Full-Wave Rectifier for Interfacing with Multi-Phase Piezoelectric Energy Harvesters.

Nathaniel J. Guilar, Rajeevan Amirtharajah, Paul J. Hurst

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

A Passive Switched-Capacitor Finite-Impulse-Response Equalizer.

Nathaniel J. Guilar, Frank Lau, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2007

Bandwidth Mismatch Correction for a Two-Channel Time-Interleaved A/D Converter.

Patrick Satarzadeh, Bernard C. Levy, Paul J. Hurst

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Bandwidth Mismatch and Its Correction in Time-Interleaved Analog-to-Digital Converters.

Tsung-Heng Tsai, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. II Express Briefs, 2006

Digital background calibration for memory effects in pipelined analog-to-digital converters.

John P. Keane, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Effect of nonlinearity in the CMFB circuit that uses the differential-difference amplifier.

Mo M. Zhang, Paul J. Hurst

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

Background interstage gain calibration technique for pipelined ADCs.

John P. Keane, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Correction to "Calibration of Sample-Time Error in a Two-Channel Time-Interleaved Analog-to-Digital Converter".

Shafiq M. Jamal, Daihong Fu, Mahendra P. Singh, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration.

Carl R. Grace, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2005

Convergence analysis of a background interstage gain calibration technique for pipelined ADCs.

Dong Wang, John P. Keane, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 200 MS/s passive switched-capacitor FIR equalizer using a time-interleaved topology.

Nathaniel J. Guilar, Pak-Kim Lau, Paul J. Hurst, Stephen H. Lewis

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

A mixed-signal approach for tuning continuous-time low-pass filters.

Anthony Tong, Paul J. Hurst

IEEE Trans. Circuits Syst. II Express Briefs, 2004

Reconstruction of band-limited periodic nonuniformly sampled signals through multirate filter banks.

Ryan Strong Prendergast, Bernard C. Levy, Paul J. Hurst

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter.

Shafiq M. Jamal, Daihong Fu, Mahendra P. Singh, Paul J. Hurst, Stephen H. Lewis

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers.

Paul J. Hurst, Stephen H. Lewis, John P. Keane, Farbod Aram, Kenneth C. Dyer

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A 12-bit 20-Msample/s pipelined analog-to-digital converter with nested digital background calibration.

Xiaoyue Wang, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2004

2003

Analog timing recovery for a noise-predictive decision-feedback equalizer.

John P. Keane, Michael Q. Le, Paul J. Hurst

IEEE J. Solid State Circuits, 2003

Digital background calibration of an algorithmic analog-to-digital converter using a simplified queue.

Eric B. Blecker, Thomas M. McDonald, Ozan E. Erdogan, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2003

A 12-bit 20-MS/s pipelined ADC with nested digital background calibration.

Xiaoyue Wang, Paul J. Hurst, Stephen H. Lewis

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

An adaptive analog noise-predictive decision-feedback equalizer.

Michael Q. Le, Paul J. Hurst, John P. Keane

IEEE J. Solid State Circuits, 2002

A 10-b 120-Msample/s time-interleaved analog-to-digital converter with digital background calibration.

Shafiq M. Jamal, Daihong Fu, Nick C.-J. Chang, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 2002

2001

A mixed-signal tuning approach for continuous-time LPFs.

Anthony Tong, Paul J. Hurst

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

A CMOS analog timing recovery circuit for PRML detectors.

Pierte Roo, Richard R. Spencer, Paul J. Hurst

IEEE J. Solid State Circuits, 2000

A CMOS HDSL2 analog front-end.

Amit Gattani, David W. Cline, Paul J. Hurst, Paul M. Mosinskis

IEEE J. Solid State Circuits, 2000

1999

An analog DFE for disk drives using a mixed-signal integrator.

Michael Q. Le, Paul J. Hurst, Kenneth C. Dyer

IEEE J. Solid State Circuits, 1999

A 12-b digital-background-calibrated algorithmic ADC with -90-dB THD.

Ozan E. Erdogan, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 1999

1998

A digital background calibration technique for time-interleaved analog-to-digital converters.

Daihong Fu, Kenneth C. Dyer, Stephen H. Lewis, Paul J. Hurst

IEEE J. Solid State Circuits, 1998

An analog background calibration technique for time-interleaved analog-to-digital converters.

Kenneth C. Dyer, Daihong Fu, Stephen H. Lewis, Paul J. Hurst

IEEE J. Solid State Circuits, 1998

1997

A second-order double-sampled delta-sigma modulator using individual-level averaging.

Chuc K. Thanh, Stephen H. Lewis, Paul J. Hurst

IEEE J. Solid State Circuits, 1997

A fully differential comparator using a switched-capacitor differencing circuit with common-mode rejection.

Tanchu Shih, Lawrence Der, Stephen H. Lewis, Paul J. Hurst

IEEE J. Solid State Circuits, 1997

A mixed-signal RAM decision-feedback equalizer for disk drives.

Bret C. Rothenberg, James E. C. Brown, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 1997

A mixed-signal decision-feedback equalizer that uses a look-ahead architecture.

Ravinder S. Kajley, Paul J. Hurst, James E. C. Brown

IEEE J. Solid State Circuits, 1997

1996

A second-order double-sampled delta-sigma modulator using additive-error switching.

Ted Vinko Burmas, Kenneth C. Dyer, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, 1996

A 35 Mb/s mixed-signal decision-feedback equalizer for disk drives in 2-μm CMOS.

James E. C. Brown, Paul J. Hurst, Lawrence Der

IEEE J. Solid State Circuits, 1996

1995

A 20-Msample/s switched-capacitor finite-impulse-response filter using a transposed structure.

Bret C. Rothenberg, Stephen H. Lewis, Paul J. Hurst

IEEE J. Solid State Circuits, December, 1995

An 80-Msample/s video switched-capacitor filter using a parallel biquadratic structure.

Steven K. Berg, Paul J. Hurst, Stephen H. Lewis

IEEE J. Solid State Circuits, August, 1995

A programmable clock generator that uses noise shaping and its application in switched-capacitor filters.

Paul J. Hurst, Bret C. Rothenberg

IEEE J. Solid State Circuits, April, 1995

1994

A Comparison of Analog DFE Architectures for Disk-Drive Applications.

James E. C. Brown, Paul J. Hurst, Lawrence Der, Iskender Agi

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1992

A VLSI processor for parallel contour tracing.

Iskender Agi, Paul J. Hurst, Anil K. Jain

IEEE Trans. Signal Process., 1992

High-speed computation of the Radon transform and backprojection using an expandable multiprocessor architecture.

Eric Shieh, K. Wayne Current, Paul J. Hurst, Iskender Agi

IEEE Trans. Circuits Syst. Video Technol., 1992

1990

A single-chip 5-V 2400-b/s modem.

Stephen D. Levy, Paul J. Hurst, Peicheng Ju, John M. Huggins, Christopher R. Cole

IEEE J. Solid State Circuits, June, 1990

An evaluation of Radon transform computations using DSP chips.

K. Wayne Current, Paul J. Hurst, Eric Shieh, Iskender Agi

Mach. Vis. Appl., 1990

A VLSI architecture for two-dimensional Radon transform computations.

Paul J. Hurst, K. Wayne Current, Iskender Agi, Eric Shieh

Proceedings of the 1990 International Conference on Acoustics, 1990

1989

A Radon transform computer for multidimensional signal processing.

Stephen G. Azevedo, James M. Brase, Harry E. Martz, Anil K. Jain, K. Wayne Current, Paul J. Hurst

Proceedings of the IEEE International Conference on Acoustics, 1989

1988

An analog front end for v.22bis modems.

Paul J. Hurst, Thomas J. Glad, J. Jeff Illgner, George F. Landsburg

IEEE J. Solid State Circuits, August, 1988

An expandable VLSI processor array approach to contour tracing.

Iskender Agi, Paul J. Hurst, Anil K. Jain

Proceedings of the IEEE International Conference on Acoustics, 1988