Paul F. Stelling

According to our database1, Paul F. Stelling authored at least 4 papers between 1995 and 1998.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

1998
Optimal Circuits for Parallel Multipliers.
IEEE Trans. Computers, 1998

1997
Implementing Multiply-Accumulate Operation in Multiplication Time.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

1996
Design strategies for optimal hybrid final adders in a parallel multiplier.
J. VLSI Signal Process., 1996

1995
Design Strategies for Optimal Multiplier Circuits.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995


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