Paul D. Agnello
According to our database1,
Paul D. Agnello
authored at least 6 papers
between 1995 and 2015.
Collaborative distances:
Collaborative distances:
Timeline
1995
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2010
2015
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2015
IBM J. Res. Dev., 2015
2012
Performance analysis and modeling of deep trench decoupling capacitor for 32 nm high-performance SOI processors and beyond.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
2011
45-nm silicon-on-insulator CMOS technology integrating embedded DRAM for high-performance server and ASIC applications.
IBM J. Res. Dev., 2011
2007
2002
Process requirements for continued scaling of CMOS-the need and prospects for atomic-level manipulation.
IBM J. Res. Dev., 2002
1995
IBM J. Res. Dev., 1995