Paul Beckett

According to our database, Paul Beckett authored at least 34 papers between 2002 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Wavelength-selective wavefront shaping by metasurface.

Zixin Cai, Xin He, Xin Liu, Shijie Tu, Xinjie Sun, Paul Beckett, Aditya Dubey, Arnan Mitchell, Guanghui Ren, Xu Liu, Xiang Hao

Frontiers Inf. Technol. Electron. Eng., 2023

2022

Optimising Power-Performance in SOI-based Null Convention Logic.

Nguyen Le Huy, Paul Beckett

Proceedings of the International Conference on IC Design and Technology, 2022

2019

TIARA: technology integrated apnea respiration analyser.

Abdur Rahim Mohammad Forkan, Flora D. Salim, Russell Conduit, Paul Beckett, Stephen R. Robinson

Proceedings of the 23rd International Symposium on Wearable Computers, ISWC 2019, London, 2019

2018

A Physical Unclonable Function With Redox-Based Nanoionic Resistive Memory.

Jeeson Kim, Taimur Ahmed, Hussein Nili, Jiawei Yang, Doo Seok Jeong, Paul Beckett, Sharath Sriram, Damith Chinthana Ranasinghe, Omid Kavehei

IEEE Trans. Inf. Forensics Secur., 2018

Clock-Less DFT-Less Test Strategy for Null Convention Logic.

Nastaran Nemati, Paul Beckett, Mark C. Reed, Karl M. Fant

IEEE Trans. Emerg. Top. Comput., 2018

FPGA Based Implementation and Area Performance Analysis of Sigma-Delta Modulated Steepest Algorithm for Channel Equalization.

Tayab Din Memon, Aneela Pathan, Paul Beckett

Proceedings of the 12th International Conference on Signal Processing and Communication Systems, 2018

2017

Usability of LoRaWAN Technology in a Central Business District.

Peter J. Radcliffe, Karina Gomez Chavez, Paul Beckett, Justin Spangaro, Conrad Jakob

Proceedings of the 85th IEEE Vehicular Technology Conference, 2017

The Bel array: asynchronous fine-grained reconfigurable co-processing.

Andrew Przybylski, Kashfia Haque, Paul Beckett

Proceedings of the Australasian Computer Science Week Multiconference, 2017

2016

Asynchronous interleaved scan architecture for on-line built-in self-test of null convention logic.

Nastaran Nemati, Mark C. Reed, Karl M. Fant, Paul Beckett

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A low latency asynchronous Jenkins hash engine for IP lookup.

Prashant Dabholkar, Renuka Sovani, Paul Beckett

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An asynchronous short word length Delta-Sigma FIR filter for low power DSP.

Renuka Sovani, Prashant Dabholkar, Paul Beckett

Proceedings of the 10th International Conference on Signal Processing and Communication Systems, 2016

The Bel array: An asynchronous fine-grained co-processor for DSP.

Andrew Przybylski, Kashfia Haque, Paul Beckett

Proceedings of the 10th International Conference on Signal Processing and Communication Systems, 2016

A high throughput, low latency null convention logic 16×16-bit multiplier.

Prashant Dabholkar, Paul Beckett

Proceedings of the 10th International Conference on Signal Processing and Communication Systems, 2016

Redesigning the Trans-disciplinary: Working Across Design, Craft and Technological Boundaries to Deliver an Integrated Wearable for Cardiac Monitoring.

Leah Heiss, Paul Beckett, Amy Carr-Bottomley

Proceedings of the 2016 ACM Conference on Designing Interactive Systems, DIS '16, Brisbane, QLD, Australia, June 04, 2016

2015

Design of asynchronous RISC CPU register-file Write-Back queue.

Matthew M. Kim, Karl M. Fant, Paul Beckett

Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Low Power Spatial Computing Using Null Convention Logic.

Kashfia Haque, Conrad Jakob, Paul Beckett

Proceedings of the IEEE International Conference on Data Science and Data Intensive Systems, 2015

2014

Radiation-Hard Field-Programmable Gate Arrays Configuration Technique Using Silicon on Sapphire.

Kashfia Haque, Paul Beckett

IEEE Trans. Very Large Scale Integr. Syst., 2014

A dual-rail LUT for reconfigurable logic using null convention logic.

Jing Yu, Paul Beckett

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

Design Techniques for NCL-Based Asynchronous Circuits on Commercial FPGA.

Matthew M. Kim, Paul Beckett

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013

POWER-Area-Performance Characteristics of FPGA-based Sigma-Delta FIR Filters.

Tayab Din Memon, Paul Beckett, Amin Z. Sadik

J. Signal Process. Syst., 2013

2012

Reconfigurable Blocks Based on Balanced Ternary.

Paul Beckett, Tayab Din Memon

J. Signal Process. Syst., 2012

2011

A SOI EEPROM Based Configuration Cell with Simple Scrubbing Detection.

Kashfia Haque, Paul Beckett

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

A Radiation Hard Lut Block with Auto-Scrubbing.

Kashfia Haque, Paul Beckett

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010

Run.

Paul Beckett, Heiko Rudolph

Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010

2009

Power scalability in a mesh-connected reconfigurable architecture.

Paul Beckett

ACM Trans. Embed. Comput. Syst., 2009

Towards a balanced ternary FPGA.

Paul Beckett

Proceedings of the 2009 International Conference on Field-Programmable Technology, 2009

2008

A Low-Power Reconfigurable Logic Array Based on Double-Gate Transistors.

Paul Beckett

IEEE Trans. Very Large Scale Integr. Syst., 2008

2007

Soft Error Rate Estimation in Deep Sub-micron CMOS.

Lianlian Zeng, Paul Beckett

Proceedings of the 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2007), 2007

2005

Why area might reduce power in nanoscale CMOS.

Paul Beckett, Seth Copen Goldstein

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Low-power spatial computing using dynamic threshold devices.

Paul Beckett

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Low-power circuits using dynamic threshold devices.

Paul Beckett

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2003

A Polymorphic Hardware Platform.

Paul Beckett

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Exploiting multiple functionality for nano-scale reconfigurable systems.

Paul Beckett

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2002

A fine-grained reconfigurable logic array based on double gate transistors.

Paul Beckett

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002