Patrick Vliex

Orcid: 0000-0002-7193-7402

According to our database1, Patrick Vliex authored at least 6 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
SiGe Qubit Biasing with a Cryogenic CMOS DAC at mK Temperature.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022
Qubit Bias using a CMOS DAC at mK Temperatures.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
Modelling, implementation and characterization of an Bias-DAC in CMOS as a building block for scalable cryogenic control electronics for future quantum computers.
PhD thesis, 2021

2019
Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2017
CMOS Based Scalable Cryogenic Control Electronics for Qubits.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017


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