Patrick Satarzadeh
According to our database1,
Patrick Satarzadeh
authored at least 9 papers
between 2007 and 2019.
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Collaborative distances:
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Bibliography
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2012
A 20mW 61dB SNDR (60MHz BW) 1b 3<sup>rd</sup>-order continuous-time delta-sigma modulator clocked at 6GHz in 45nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEEE J. Solid State Circuits, 2011
2010
A parametric polyphase domain approach to blind calibration of timing mismatches for M-channel time-interleaved ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
Adaptive Semiblind Calibration of Bandwidth Mismatch for Two-Channel Time-Interleaved ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007