Patrick Ndai
According to our database1,
Patrick Ndai
authored at least 12 papers
between 2005 and 2011.
Collaborative distances:
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Bibliography
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
2010
Trifecta: A Nonspeculative Scheme to Exploit Common, Data-Dependent Subcritical Paths.
IEEE Trans. Very Large Scale Integr. Syst., 2010
A Scalable Circuit-Architecture Co-Design to Improve Memory Yield for High-Performance Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2010
Design Paradigm for Robust Spin-Torque Transfer Magnetic RAM (STT MRAM) From Circuit/Architecture Perspective.
IEEE Trans. Very Large Scale Integr. Syst., 2010
2009
REad/access-preferred (REAP) SRAM - architecture-aware bit cell design for improved yield and lower VMIN.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
An alternate design paradigm for robust spin-torque transfer magnetic RAM (STT MRAM) from circuit/architecture perspective.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Within-Die Variation-Aware Scheduling in Superscalar Processors for Improved Throughput.
IEEE Trans. Computers, 2008
O<sup>2</sup>C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005