Patrick Adde
According to our database1,
Patrick Adde
authored at least 22 papers
between 1996 and 2012.
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Bibliography
2012
Design of an Efficient Maximum Likelihood Soft Decoder for Systematic Short Block Codes.
IEEE Trans. Signal Process., 2012
A low-complexity soft-decision decoding architecture for the binary extended Golay code.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture.
J. Signal Process. Syst., 2011
2010
Int. J. Commun. Netw. Syst. Sci., 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping.
J. Signal Process. Syst., 2009
2008
Reed-Solomon Turbo Product Codes for Optical Communications: From Code Optimization to Decoder Design.
EURASIP J. Wirel. Commun. Netw., 2008
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
Architecture de turbo-décodeur en blocs entièrement parallèle pour la transmission de données au-delà du Gbit/s.
Ann. des Télécommunications, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Some Results on the Binary Minimum Distance of Reed-Solomon Codes and Block Turbo Codes.
Proceedings of IEEE International Conference on Communications, 2007
2006
Information Theory Turbo decoding of product codes for Gigabit per second applications and beyond.
Eur. Trans. Telecommun., 2006
Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2002
Proceedings of the Global Telecommunications Conference, 2002
2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
1999
Ann. des Télécommunications, 1999
1996
Turbo-decoder synchronisation procedure: application to the CAS5093 integrated circuit.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996