Patricio Bulic

Orcid: 0000-0002-0536-3316

According to our database1, Patricio Bulic authored at least 33 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Understanding Computer Organization - A Guide to Principles Across RISC-V, ARM Cortex, and Intel Architectures
Undergraduate Topics in Computer Science, Springer, ISBN: 978-3-031-58074-1, 2024

2021
A Two-Stage Operand Trimming Approximate Logarithmic Multiplier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

An Approximate GEMM Unit for Energy-Efficient Object Detection.
Sensors, 2021

On the Design of an Energy Efficient Digital IIR A-Weighting Filter Using Approximate Multiplication.
Sensors, 2021

2020
On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding.
IEEE Access, 2020

2019
Data Transmission Efficiency in Bluetooth Low Energy Versions.
Sensors, 2019

2018
Introduction to Parallel Computing - From Algorithms to Programming on State-of-the-Art Platforms
Undergraduate Topics in Computer Science, Springer, ISBN: 978-3-319-98832-0, 2018

Accurate Indoor Sound Level Measurement on a Low-Power and Low-Cost Wireless Sensor Node.
Sensors, 2018

2017
Logarithmic Arithmetic for Low-Power Adaptive Control Systems.
Circuits Syst. Signal Process., 2017

2014
An approximate logarithmic squaring circuit with error compensation for DSP applications.
Microelectron. J., 2014

2013
A GPU implementation of a structural-similarity-based aerial-image classification.
J. Supercomput., 2013

An FPGA-based integrated environment for computer architecture.
Comput. Appl. Eng. Educ., 2013

2012
Applicability of approximate multipliers in hardware neural networks.
Neurocomputing, 2012

2011
An approximate method for filtering out data dependencies with a sufficiently large distance between memory references.
J. Supercomput., 2011

An iterative logarithmic multiplier.
Microprocess. Microsystems, 2011

A simple pipelined squaring circuit for DSP.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

Logarithmic Multiplier in Hardware Implementation of Neural Networks.
Proceedings of the Adaptive and Natural Computing Algorithms, 2011

2010
A simple pipelined logarithmic multiplier.
Proceedings of the 28th International Conference on Computer Design, 2010

2008
Identifying Data Dependencies with a Sufficiently Large Distance Between Memory References in a Multimedia Vectorizing Compiler.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2008

2006
Learning computer architecture concepts with the FPGA-based "Move" microprocessor.
Comput. Appl. Eng. Educ., 2006

On the Use of the MMC Language to Utilize SIMD Instruction Set.
Proceedings of the High Performance Computing for Computational Science, 2006

Exploiting Multimedia Extensions with a Data Parallel Language.
Proceedings of the 14th Euromicro International Conference on Parallel, 2006

2005
An efficient way to filter out data dependences with a sufficiently large distance between memory references.
ACM SIGPLAN Notices, 2005

2004
On Dependence Analysis for SIMD Enhanced Processors.
Proceedings of the High Performance Computing for Computational Science, 2004

Fast Dependence Analysis in a Multimedia Vectorizing Compiler.
Proceedings of the 12th Euromicro Workshop on Parallel, 2004

D-Test: An Extension to Banerjee Test for a Fast Dependence Analysis in a Multimedia Vectorizing Compiler.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

2003
An Extended ANSI C for Processors with a Multimedia Extension.
Int. J. Parallel Program., 2003

Practical Dependence Analysis in a SIMD Vectorizing Compiler.
Proceedings of the 11th Euromicro Workshop on Parallel, 2003

An Extended ANSI C for Multimedia Processing.
Proceedings of the Parallel Computing Technologies, 2003

Data Dependence Analysis for Intra-Register Vectorization.
Proceedings of the 2nd International Symposium on Parallel and Distributed Computing (ISPDC 2003), 2003

2002
Introducing the Vector C.
Proceedings of the High Performance Computing for Computational Science, 2002

2001
Extracting SIMD Parallelism from 'for' Loops.
Proceedings of the 30th International Workshops on Parallel Processing (ICPP 2001 Workshops), 2001

Macro Extension for SIMD Processing.
Proceedings of the Euro-Par 2001: Parallel Processing, 2001


  Loading...