Pasquale Ciao
According to our database1,
Pasquale Ciao
authored at least 3 papers
between 2004 and 2006.
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Bibliography
2006
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
2004
A Parallel VLSI Architecture for 1-Gb/s, 2048-b, Rate-1/2 Turbo Gallager Code Decoder.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004