Pascal Pieper

Orcid: 0000-0002-7155-2537

According to our database1, Pascal Pieper authored at least 8 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Better early than never: formal and pracitcal techniques for the complex system design process using virtual prototypes.
PhD thesis, 2023

Virtual-Peripheral-in-the-Loop : A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap.
CoRR, 2023

2022
Advanced Environment Modeling and Interaction in an Open Source RISC-V Virtual Prototype.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

Verifying SystemC TLM peripherals using modern C++ symbolic execution tools.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Minimally Invasive HW/SW Co-debug Live Visualization on Architecture Level.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020
RISC-V based virtual prototype: An extensible and configurable platform for the system-level.
J. Syst. Archit., 2020

Dynamic Information Flow Tracking for Embedded Binaries using SystemC-based Virtual Prototypes.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2016
Umgebung für automatisierte Tests von Dateisystemen auf NAND-Flash-Speichern.
Proceedings of the Internet der Dinge, 2016


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