Partha S. Roop

Orcid: 0000-0001-9654-5678

Affiliations:
  • University of Auckland, New Zealand


According to our database1, Partha S. Roop authored at least 158 papers between 1995 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Towards Personalised Mood Prediction and Explanation for Depression from Biophysical Data.
Sensors, 2024

The Future of Software Engineering in an AI-Driven World.
CoRR, 2024

Logical Synchrony Networks: A Formal Model for Deterministic Distribution.
IEEE Access, 2024

Scalable Security Enforcement for Cyber Physical Systems.
IEEE Access, 2024

Runtime Verified Neural Networks for Cyber-Physical Systems.
Proceedings of the 7th ACM International Workshop on Verification and Monitoring at Runtime Execution, 2024

A Formal Approach for Safe Reinforcement Learning: A Rate-Adaptive Pacemaker Case Study.
Proceedings of the Runtime Verification - 24th International Conference, 2024

2023
Model Based Verification of Spiking Neural Networks in Cyber Physical Systems.
IEEE Trans. Computers, September, 2023

Synchronous Deterministic Parallel Programming for Multi-Cores with ForeC.
ACM Trans. Program. Lang. Syst., June, 2023

A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications.
IEEE Embed. Syst. Lett., March, 2023

Incremental Security Enforcement for Cyber-Physical Systems.
IEEE Access, 2023

A Novel Framework for the Design of Resilient Cyber-Physical Systems Using Control Theory and Formal Methods.
IEEE Access, 2023

Evolving a Programming CS2 Course: A Decade-Long Experience Report.
Proceedings of the 54th ACM Technical Symposium on Computer Science Education, Volume 1, 2023

2022
High Fidelity Simulation of Hybrid Systems using Higher Order Hybrid Automata.
IEEE Trans. Computers, 2022

Runtime Monitoring and Statistical Approaches for Correlation Analysis of ECG and PPG.
CoRR, 2022

A framework for the design of a closed-loop gastric pacemaker for treating conduction block.
Comput. Methods Programs Biomed., 2022

Development of closed-loop modelling framework for adaptive respiratory pacemakers.
Comput. Biol. Medicine, 2022

A novel approach to Real-time contract based reasoning for Hybrid Systems.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

Runtime Verification for Clinically Interpretable Arrhythmia Classification.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

Policy-Based Hypertension Monitoring Using Formal Runtime Verification Monitors.
Proceedings of the Bioinformatics Research and Applications - 18th International Symposium, 2022

Policy-Based Diabetes Detection using Formal Runtime Verification Monitors.
Proceedings of the 35th IEEE International Symposium on Computer-Based Medical Systems, 2022

2021
A New Safety Distance Calculation for Rear-End Collision Avoidance.
IEEE Trans. Intell. Transp. Syst., 2021

Compositional runtime enforcement revisited.
Formal Methods Syst. Des., 2021

Designing Neural Networks for Real-Time Systems.
IEEE Embed. Syst. Lett., 2021

Runtime Interchange for Adaptive Re-use of Intelligent Cyber-Physical System Controllers.
CoRR, 2021

Runtime verification of implantable medical devices using multiple physiological signals.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

A secure insulin infusion system using verification monitors.
Proceedings of the MEMOCODE '21: 19th ACM-IEEE International Conference on Formal Methods and Models for System Design, Virtual Event, China, November 20, 2021

Formal modelling of attack scenarios and mitigation strategies in IEEE 1588.
Proceedings of the MEMOCODE '21: 19th ACM-IEEE International Conference on Formal Methods and Models for System Design, Virtual Event, China, November 20, 2021

2020
Closing the Loop: Validation of Implantable Cardiac Devices With Computational Heart Models.
IEEE J. Biomed. Health Informatics, 2020

Smart I/O Modules for Mitigating Cyber-Physical Attacks on Industrial Control Systems.
IEEE Trans. Ind. Informatics, 2020

Robust Design and Validation of Cyber-physical Systems.
ACM Trans. Embed. Comput. Syst., 2020

Cardiac Electrical Modeling for Closed-Loop Validation of Implantable Devices.
IEEE Trans. Biomed. Eng., 2020

<i>SneakLeak+</i>: Large-scale klepto apps analysis.
Future Gener. Comput. Syst., 2020

A novel approach for model-based design of gastric pacemakers.
Comput. Biol. Medicine, 2020

Formal Runtime Monitoring Approaches for Autonomous Vehicles.
Proceedings of the 2nd Workshop on Artificial Intelligence and Formal Verification, 2020

Formal Modeling and Verification of Rate Adaptive Pacemakers for Heart Failure.
Proceedings of the 18th ACM/IEEE International Conference on Formal Methods and Models for System Design, 2020

Semantics-Directed Hardware Generation of Hybrid Systems.
Proceedings of the 11th ACM/IEEE International Conference on Cyber-Physical Systems, 2020

Design of a closed-loop gastric pacemaker for modulating dysrhythmic conduction patterns via extracellular potentials.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

A compositional approach using Keras for neural networks in real-time systems.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Formal Modeling and Verification of a Victim DRAM Cache.
ACM Trans. Design Autom. Electr. Syst., 2019

A Formal Approach for Scalable Simulation of Gastric ICC Electrophysiology.
IEEE Trans. Biomed. Eng., 2019

A compositional semantics of Simulink/Stateflow based on quantized state hybrid automata.
Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2019

Securing implantable medical devices with runtime enforcement hardware.
Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2019

A compositional approach for real-time machine learning.
Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2019

A formal analysis approach for verifying the design of respiratory pacing devices.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2019

Synthesizing IEC 61499 Function Blocks to hardware.
Proceedings of the International Conference on Electronics, Information, and Communication, 2019

2018
A Formal Approach for Modeling and Simulation of Human Car-Following Behavior.
IEEE Trans. Intell. Transp. Syst., 2018

Emulation of Cyber-Physical Systems Using IEC-61499.
IEEE Trans. Ind. Informatics, 2018

Towards the Emulation of the Cardiac Conduction System for Pacemaker Validation.
ACM Trans. Cyber Phys. Syst., 2018

Formal Modeling and Verification of Controllers for a Family of DRAM Caches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A Parametric Computational Model of the Action Potential of Pacemaker Cells.
IEEE Trans. Biomed. Eng., 2018

Quantized State Hybrid Automata for Cyber-Physical Systems.
CoRR, 2018

Synchronous neural networks for cyber-physical systems.
Proceedings of the 16th ACM/IEEE International Conference on Formal Methods and Models for System Design, 2018

Security of Pacemakers using Runtime Verification.
Proceedings of the 16th ACM/IEEE International Conference on Formal Methods and Models for System Design, 2018

Faster Function Blocks for Precision Timed Industrial Automation.
Proceedings of the 21st IEEE International Symposium on Real-Time Distributed Computing, 2018

Rethinking the Validation Process for Medical Devices: A Cardiac Pacemaker Case Study.
Proceedings of the 21st IEEE International Symposium on Real-Time Distributed Computing, 2018

Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach.
Proceedings of the Programming Languages and Systems, 2018

Logic Meets Algebra: Compositional Timing Analysis for Synchronous Reactive Multithreading.
Proceedings of the Models, Mindsets, 2018

2017
Unified Functional Safety Assessment of Industrial Automation Systems.
IEEE Trans. Ind. Informatics, 2017

Timing Analysis of Synchronous Programs using WCRT Algebra: Scalability through Abstraction.
ACM Trans. Embed. Comput. Syst., 2017

Runtime Enforcement of Cyber-Physical Systems.
ACM Trans. Embed. Comput. Syst., 2017

Modular Compilation of Hybrid Systems for Emulation and Large Scale Simulation.
ACM Trans. Embed. Comput. Syst., 2017

A Novel Emulation Model of the Cardiac Conduction System.
ACM Trans. Embed. Comput. Syst., 2017

SneakLeak: Detecting Multipartite Leakage Paths in Android Apps.
Proceedings of the 2017 IEEE Trustcom/BigDataSE/ICESS, Sydney, Australia, August 1-4, 2017, 2017

Runtime enforcement of reactive systems using synchronous enforcers.
Proceedings of the 24th ACM SIGSOFT International SPIN Symposium on Model Checking of Software, 2017

Simulation of cyber-physical systems using IEC61499.
Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2017

A Model Driven Approach for Cardiac Pacemaker Design Using a PRET Processor.
Proceedings of the 20th IEEE International Symposium on Real-Time Distributed Computing, 2017

Compositional timing-aware semantics for synchronous programming.
Proceedings of the 2017 Forum on Specification and Design Languages, 2017

An intracardiac electrogram model to bridge virtual hearts and implantable cardiac devices.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017

Detecting Inter-App Information Leakage Paths.
Proceedings of the 2017 ACM on Asia Conference on Computer and Communications Security, 2017

2016
Hierarchical and Concurrent ECCs for IEC 61499 Function Blocks.
IEEE Trans. Ind. Informatics, 2016

Towards the Emulation of the Cardiac Conduction System for Pacemaker Testing.
CoRR, 2016

The ForeC Synchronous Deterministic Parallel Programming Language for Multicores.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

RunSync: A Predictable Runtime for Precision Timed Automation Systems.
Proceedings of the 19th IEEE International Symposium on Real-Time Distributed Computing, 2016

Mixed-Criticality Systems as a Service for Non-critical Tasks.
Proceedings of the 19th IEEE International Symposium on Real-Time Distributed Computing, 2016

A Novel WCET Semantics of Synchronous Programs.
Proceedings of the Formal Modeling and Analysis of Timed Systems, 2016

Energy and timing aware synchronous programming.
Proceedings of the 2016 International Conference on Embedded Software, 2016

Hybrid automata models of cardiac ventricular electrophysiology for real-time computational applications.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

Precision timed industrial automation systems.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Modular code generation for emulating the electrical conduction system of the human heart.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Requirements-centric closed-loop validation of implantable cardiac devices.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Hybrid Automata Model of the Heart for Formal Verification of Pacemakers.
Proceedings of the ARCH@CPSWeek 2016, 2016

2015
A synchronous rendering of hybrid systems for designing Plant-on-a-Chip (PoC).
CoRR, 2015

A unified framework for modeling and implementation of hybrid systems with synchronous controllers.
CoRR, 2015

Synthesizing Multirate Programs from IEC 61499.
Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

Schedule Synthesis for Time-Triggered Multi-hop Wireless Networks with Retransmissions.
Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

Fairness-Based Measures for Safety-Critical Vehicular Ad-Hoc Networks.
Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

Model-Driven Design Using IEC 61499 - A Synchronous Approach for Embedded and Automation Systems.
Springer, ISBN: 978-3-319-10520-8, 2015

2014
A Formal Approach to Incremental Converter Synthesis for System-on-Chip Design.
ACM Trans. Design Autom. Electr. Syst., 2014

Sequentially Constructive Concurrency - A Conservative Extension of the Synchronous Model of Computation.
ACM Trans. Embed. Comput. Syst., 2014

A Predictable Framework for Safety-Critical Embedded Systems.
IEEE Trans. Computers, 2014

Relaxing the synchronous approach for mixed-criticality systems.
Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

A model-driven approach with synchronous semantics for developing hard real-time WSNs.
Proceedings of the 2014 IEEE Emerging Technology and Factory Automation, 2014

2013
Web Service Choreography: Unanimous Handling of Control and Data.
Int. J. Softw. Informatics, 2013

Stateful Web Services - Auto Modeling and Composition.
Proceedings of the 2013 IEEE 20th International Conference on Web Services, Santa Clara, CA, USA, June 28, 2013

Precise timing analysis for direct-mapped caches.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

ILPc: A novel approach for scalable timing analysis of synchronous programs.
Proceedings of the International Conference on Compilers, 2013

Programming and Timing Analysis of Parallel Programs on Multicores.
Proceedings of the 13th International Conference on Application of Concurrency to System Design, 2013

Precision Timed Embedded Systems Using TickPAD Memory.
Proceedings of the 13th International Conference on Application of Concurrency to System Design, 2013

2012
Synthesizing Globally Asynchronous Locally Synchronous Systems With IEC 61499.
IEEE Trans. Syst. Man Cybern. Part C, 2012

Implementing constrained cyber-physical systems with IEC 61499.
ACM Trans. Embed. Comput. Syst., 2012

Combining IEC 61499 Model-Based Design with Component-Based Architecture for Robotics.
Proceedings of the Simulation, Modeling, and Programming for Autonomous Robots, 2012

A Service Composition Framework Based on Goal-Oriented Requirements Engineering, Model Checking, and Qualitative Preference Analysis.
Proceedings of the Service-Oriented Computing - 10th International Conference, 2012

Model-driven development of industrial embedded systems: Challenges faced and lessons learnt.
Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation, 2012

Correct-by-construction multi-component SoC design.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Design of Distributed Heterogeneous Embedded Systems in DDFCharts.
IEEE Trans. Parallel Distributed Syst., 2011

Unified management of control flow and data mismatches in web service composition.
Proceedings of the IEEE 6th International Symposium on Service Oriented System Engineering, 2011

Compiling Esterel for Multi-core Execution.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Environment Modelling for Tighter Timing Analysis of Synchronous Programs.
Proceedings of the Sixth IEEE International Symposium on Electronic Design, 2011

Pruning infeasible paths for tight WCRT analysis of synchronous programs.
Proceedings of the Design, Automation and Test in Europe, 2011

Efficient WCRT analysis of synchronous programs using reachability.
Proceedings of the 48th Design Automation Conference, 2011

2010
Verifying IEC 61499 Function Blocks Using Esterel.
IEEE Embed. Syst. Lett., 2010

SystemJ: A GALS language for system level design.
Comput. Lang. Syst. Struct., 2010

Predictable multithreading of embedded applications using PRET-C.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

Deterministic, predictable and light-weight multithreading using PRET-C.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
SystemJ compilation using the tandem virtual machine approach.
ACM Trans. Design Autom. Electr. Syst., 2009

A Synchronous Approach for IEC 61499 Function Block Implementation.
IEEE Trans. Computers, 2009

A New Multithreaded Architecture Supporting Direct Execution of Esterel.
EURASIP J. Embed. Syst., 2009

A Hierarchical and Concurrent Approach for IEC 61499 Function Blocks.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2009

Multi-clock Soc design using protocol conversion.
Proceedings of the Design, Automation and Test in Europe, 2009

Tight WCRT analysis of synchronous C programs.
Proceedings of the 2009 International Conference on Compilers, 2009

Specification Enforcing Refinement for Convertibility Verification.
Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009

2008
STARPro - A new multithreaded direct execution platform for Esterel.
Proceedings of the Third International Workshop on Model-driven High-level Programming of Embedded Systems, 2008

SoC Design Approach Using Convertibility Verification.
EURASIP J. Embed. Syst., 2008

A Module Checking Based Converter Synthesis Approach for SoCs.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Tandem virtual machine - An efficient execution platform for GALS language SystemJ.
Proceedings of the 13th Asia-Pacific Computer Systems Architecture Conference, 2008

2007
Precise specification matching for adaptive reuse in embedded systems.
J. Appl. Log., 2007

A Model Checking Approach to Protocol Conversion.
Proceedings of the International Workshop on Model-driven High-level Programming of Embedded Systems, 2007

McCharts and Multiclock FSMs for modeling large scale systems.
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

2006
HiDRA - A reactive multiprocessor architecture for heterogeneous embedded systems.
Microprocess. Microsystems, 2006

Local Module Checking for CTL Specifications.
Proceedings of the Workshop on Formal Foundations of Embedded Software and Component-Based Software Architectures, 2006

Modeling Embedded Systems: From SystemC and Esterel to DFCharts.
IEEE Des. Test Comput., 2006

Design of Heterogeneous Embedded Systems Using DFCharts Model of Computation.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

A Scheduler Support Unit for Reactive Microprocessors.
Proceedings of the 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 2006

The SystemJ approach to system-level design.
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

2005
A New Model for Heterogeneous Embedded Systems - What Esterel and SyncCharts Need to Become a Suitable Specification Platform.
Int. J. Softw. Eng. Knowl. Eng., 2005

Adaptive Verification using Forced Simulation.
Proceedings of the Second International Workshop on Formal Foundations of Embedded Software and Component-based Software Architectures, 2005

Adaptive Techniques for Specification Matching in Embedded Systems: A Comparative Study.
Proceedings of the Integrated Formal Methods, 5th International Conference, 2005

Modelling Heterogeneous Embedded Systems in DFCarts.
Proceedings of the Forum on specification and Design Languages, 2005

REMIC: design of a reactive embedded microprocessor core.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
REFLIX: a processor core with native support for control-dominated embedded applications.
Microprocess. Microsystems, 2004

Customizing Processor Cores to Support Reactivity.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Towards direct execution of esterel programs on reactive processors.
Proceedings of the EMSOFT 2004, 2004

HiDRA: A New Architecture for Heterogeneous Embedded Systems.
Proceedings of the International Conference on Embedded Systems and Applications, 2004

2003
Five Challenges in Teaching XP.
Proceedings of the Extreme Programming and Agile Processes in Software Engineering, 2003

A Customer Test Generator for Web-Based Systems.
Proceedings of the Extreme Programming and Agile Processes in Software Engineering, 2003

A New Reactive Processor with Architectural Support for Control Dominated Embedded Systems.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

2002
k-time Forced Simulation: A Formal Verification Technique for IP Reuse.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

REFLIX: A Processor Core for Reactive Embedded Applications.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
Forced simulation: A technique for automating component reuse in embedded systems.
ACM Trans. Design Autom. Electr. Syst., 2001

A formal approach to component based development of synchronous programs.
Proceedings of ASP-DAC 2001, 2001

2000
Automatic Component Matching Using Forced Simulation.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Automated Component Adaptation by Forced Simulation.
Proceedings of the 5th Australasian Computer Architecture Conference (ACAC 2000), 31 January, 2000

1998
CFSMcharts: A New Language for Microprocessor Based system Design.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

Hidden time model for specification and verification of embedded systems.
Proceedings of the 10th Euromicro Conference on Real-Time Systems (ECRTS 1998), 1998

1996
A new algorithm for implementation of design functions by available devices.
IEEE Trans. Very Large Scale Integr. Syst., 1996

1995
Implementation of design functions by available devices: a new algorithm.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995


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