A case for shared instruction cache on chip multiprocessors running OLTP. - Partha Kundu; Murali Annavaram; Trung A. Diep; John Paul Shen (SIGARCH Comput. Archit. News, 2004)

Hybrid transactional memory. - Sanjeev Kumar; Michael Chu; Christopher J. Hughes; Partha Kundu; Anthony D. Nguyen (PPoPP, 2006)

A 4.6Tbits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS. - Amit Kumar 002; Partha Kundu; Arvind P. Singh; Li-Shiuan Peh; Niraj K. Jha (ICCD, 2007)

Express virtual channels: towards the ideal interconnection fabric. - Amit Kumar 002; Li-Shiuan Peh; Partha Kundu; Niraj K. Jha (ISCA, 2007)

Guest Editors' Introduction: On-Chip Interconnects for Multicores. - Partha Kundu; Li-Shiuan Peh (IEEE Micro, 2007)

Toward Ideal On-Chip Communication Using Express Virtual Channels. - Amit Kumar 002; Li-Shiuan Peh; Partha Kundu; Niraj K. Jha (IEEE Micro, 2008)

The power of data centers: Opportunities and challenges. - Partha Kundu (Green Computing Conference, 2010)

Curbing energy cravings in networks: A cross-sectional view across the micro-macro boundary. - Amlan Ganguly; Partha Kundu; Pradip Bose (NOCS, 2011)