PariVallal Kannan

According to our database1, PariVallal Kannan authored at least 12 papers between 1998 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
Performance driven routing for modern FPGAs.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2006
Interconnect estimation for FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2004
On metrics for comparing interconnect estimation methods for FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Estimating Pre-Placement FPGA Interconnection Requirements.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

2003
Interconnect Estimation for FPGAs under Timing Driven Domains.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002
On Routing Demand and Congestion Estimation for FPGAs.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Rapid and Reliable Routability Estimation for FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002

On metrics for comparing routability estimation methods for FPGAs.
Proceedings of the 39th Design Automation Conference, 2002

2001
fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits.
Proceedings of the Field-Programmable Logic and Applications, 2001

Tightly Integrated Placement and Routing for FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2001

1999
NEBULA: A Partially and Dynamically Reconfigurable Architecture.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998
REACT: Reactive Environment for Runtime Reconfiguration.
Proceedings of the Field-Programmable Logic and Applications, 1998


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