Parijat Mukherjee
Orcid: 0000-0002-2532-7347
According to our database1,
Parijat Mukherjee
authored at least 18 papers
between 2011 and 2024.
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Bibliography
2024
Constructive Place-and-Route for FinFET-Based Transistor Arrays in Analog Circuits Under Nonlinear Gradients.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2021
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
Proceedings of the ISPD '21: International Symposium on Physical Design, 2021
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
2016
Using Presilicon Knowledge to Excite Nonlinear Failure Modes in Large Mixed-Signal Circuits.
IEEE Des. Test, 2016
2014
Leveraging pre-silicon data to diagnose out-of-specification failures in mixed-signal circuits.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2012
Efficient Identification of Unstable Loops in Large Linear Analog Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
2011
Proceedings of the 48th Design Automation Conference, 2011