Paolo Valente

Orcid: 0000-0002-1842-4974

According to our database1, Paolo Valente authored at least 35 papers between 2004 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
HMB: Scheduling PREM-Like Real-Time Tasks at High Memory Bandwidth (Invited Paper).
Proceedings of the Fifth Workshop on Next Generation Real-Time Embedded Systems, 2024

2023
Evaluating Controlled Memory Request Injection for Efficient Bandwidth Utilization and Predictable Execution in Heterogeneous SoCs.
ACM Trans. Embed. Comput. Syst., 2023

The Importance of Worst-Case Memory Contention Analysis for Heterogeneous SoCs.
CoRR, 2023

Fine-Grained QoS Control via Tightly-Coupled Bandwidth Monitoring and Regulation for FPGA-based Heterogeneous SoCs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Novel Methodology for Assessing Chip-Package Interaction Effects onChip Performance.
Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

2020
Evaluating Controlled Memory Request Injection to Counter PREM Memory Underutilization.
Proceedings of the Job Scheduling Strategies for Parallel Processing, 2020

Managing Human-driven and Autonomous Vehicles at Smart Intersections.
Proceedings of the IEEE International Conference on Human-Machine Systems, 2020

2019
A parallel branch-and-bound algorithm to compute a tighter tardiness bound for preemptive global EDF.
Real Time Syst., 2019

Deterministic Memory Hierarchy and Virtualization for Modern Multi-Core Embedded Systems.
Proceedings of the 25th IEEE Real-Time and Embedded Technology and Applications Symposium, 2019

2018
A survey on shared disk I/O management in virtualized environments under real time constraints.
SIGBED Rev., 2018

Achieving a high throughput and a low latency through a modular packet scheduler.
Int. J. Commun. Networks Distributed Syst., 2018

PSPAT: Software packet scheduling at hardware speed.
Comput. Commun., 2018

2017
A branch-and-bound algorithm to compute a tighter bound to tardiness for preemptive global EDF scheduler.
Proceedings of the 25th International Conference on Real-Time Networks and Systems, 2017

SiGAMMA: server based integrated GPU arbitration mechanism for memory accesses.
Proceedings of the 25th International Conference on Real-Time Networks and Systems, 2017

2016
Using a lag-balance property to tighten tardiness bounds for global EDF.
Real Time Syst., 2016

A Survey on Shared I/O Management in Virtualized Environments under Real Time Constraints.
Proceedings of the Embedded Operating Systems Workshop co-located with the Embedded Systems Week (ESWEEK 2016), 2016

2015
On service guarantees of fair-queueing schedulers in real systems.
Comput. Commun., 2015

Integrating Linux and the real-time ERIKA OS through the Xen hypervisor.
Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

2014
TEMPEST: a new Test EnvironMent for Performance Evaluation of the Scheduling of packeTs.
Simul. Model. Pract. Theory, 2014

Reducing the execution time of fair-queueing packet schedulers.
Comput. Commun., 2014

TEMPEST: Test environment for performance evaluation of the scheduling of packets.
Proceedings of the IEEE 10th International Conference on Wireless and Mobile Computing, 2014

A low-latency and high-throughput scheduler for emergency and wireless networks.
Proceedings of the IEEE International Conference on Communications, 2014

2013
QFQ: Efficient Packet Scheduling With Tight Guarantees.
IEEE/ACM Trans. Netw., 2013

Providing Near-Optimal Fair-Queueing Guarantees at Round-Robin Amortized Cost.
Proceedings of the 22nd International Conference on Computer Communication and Networks, 2013

A Modular Architecture for QoS Provisioning over Wireless Links.
Proceedings of the 27th International Conference on Advanced Information Networking and Applications Workshops, 2013

2012
Direct vs 2-Stage Approaches to Structured Motif Finding.
Algorithms Mol. Biol., 2012

Improving application responsiveness with the BFQ disk I/O scheduler.
Proceedings of the 5th Annual International Systems and Storage Conference, 2012

2010
High Throughput Disk Scheduling with Fair Bandwidth Distribution.
IEEE Trans. Computers, 2010

2008
An STDMA-based framework for QoS provisioning in wireless mesh networks.
Proceedings of the IEEE 5th International Conference on Mobile Adhoc and Sensor Systems, 2008

2007
Exact GPS simulation and optimal fair scheduling with logarithmic complexity.
IEEE/ACM Trans. Netw., 2007

2005
Scheduling algorithms for quality of service provisioning.
PhD thesis, 2005

An Upper Bound to the Lateness of Soft Real-Time Tasks Scheduled by EDF on Multiprocessors.
Proceedings of the 26th IEEE Real-Time Systems Symposium (RTSS 2005), 2005

Design and Testing of Scalable Web-Based Systems with Performance Constraints.
Proceedings of the FIRB-Perf Workshop on Techniques, 2005

Extending WF^2 Q+ to Support a Dynamic Traffic Mix.
Proceedings of the First International Workshop on Advanced Architectures and Algorithms for Internet Delivery and Applications, 2005

2004
Exact GPS simulation with logarithmic complexity, and its application to an optimally fair scheduler.
Proceedings of the ACM SIGCOMM 2004 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communication, August 30, 2004


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