Paolo Maistri
According to our database1,
Paolo Maistri
authored at least 74 papers
between 2002 and 2024.
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Bibliography
2024
Cross-layer analysis of clock glitch fault injection while fetching variable-length instructions.
J. Cryptogr. Eng., June, 2024
Capture the Pulse: Impact of FPGA Resource Utilization on EM Fault Injection Attacks Detection.
Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
Harmonic Response of Ring Oscillators under Single ElectroMagnetic Pulsed Fault Injection.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
Non-Invasive Attack on Ring Oscillator-Based PUFs Through Localized X-Ray Irradiation.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024
Proceedings of the IEEE European Test Symposium, 2024
Choose your Path: Control of Ring Oscillators EMFI Susceptibility through FPGA P&R Constraints.
Proceedings of the 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
2023
Ray-Spect: Local Parametric Degradation for Secure Designs: An application to X-Ray Fault Injection.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
A Study of High Temperature Effects on Ring Oscillator Based Physical Unclonable Functions.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
Microarchitectural Insights into Unexplained Behaviors Under Clock Glitch Fault Injection.
Proceedings of the Smart Card Research and Advanced Applications, 2023
2022
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions.
IEEE Des. Test, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
Proceedings of the IEEE International Test Conference, 2021
Microarchitecture-aware Fault Models: Experimental Evidence and Cross-Layer Inference Methodology.
Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021
2020
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020
A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System.
Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020
Proceedings of the IEEE European Test Symposium, 2020
2019
Proceedings of the 4th IEEE International Verification and Security Workshop, 2019
2018
Hardware Support for Security in the Internet of Things: From Lightweight Countermeasures to Accelerated Homomorphic Encryption.
Inf., 2018
The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model.
Proceedings of the 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2018
2017
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017
2016
Dummy operations in scalar multiplication over elliptic curves: A tradeoff between security and performance.
Microprocess. Microsystems, 2016
Analysis of laser-induced errors: RTL fault models versus layout locality characteristics.
Microprocess. Microsystems, 2016
Proceedings of the 1st IEEE International Verification and Security Workshop, 2016
Proceedings of the 11th International Design & Test Symposium, 2016
HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015
2014
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the VLSI-SoC: Internet of Things Foundations, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014
Electromagnetic attacks on embedded devices: A model of probe-circuit power coupling.
Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
A multiple fault injection methodology based on cone partitioning towards RTL modeling of laser attacks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
2013
Forecasting the Effects of Electromagnetic Fault Injections on Embedded Cryptosystems.
Inf. Secur. J. A Glob. Perspect., 2013
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
2011
Glitch and Laser Fault Attacks onto a Secure AES Implementation on a SRAM-Based FPGA.
J. Cryptol., 2011
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
10-Gigabit Throughput and Low Area for a Hardware Implementation of the Advanced Encryption Standard.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
2010
Dependability analysis of a countermeasure against fault attacks by means of laser shots onto a SRAM-based FPGA.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
2009
Proceedings of the 10th Latin American Test Workshop, 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
IEEE Trans. Computers, 2008
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
IEEE Trans. Computers, 2007
Proceedings of the Fourth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2007
Evaluation of Register-Level Protection Techniques for the Advanced Encryption Standard by Multi-Level Fault Injections.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
2006
Cryptographic algorithms and architectures and their connections with errors and reliability.
PhD thesis, 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the Fault Diagnosis and Tolerance in Cryptography, 2006
Proceedings of the Fault Diagnosis and Tolerance in Cryptography, 2006
2005
Incorporating Error Detection and Online Reconfiguration into a Regular Architecture for the Advanced Encryption Standard.
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005
2004
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004
Proceedings of the 15th IEEE International Conference on Application-Specific Systems, 2004
2003
Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard.
IEEE Trans. Computers, 2003
Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard.
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003
Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003
2002
A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard.
Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002
On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002