Pantea Kiaei

Orcid: 0000-0001-8450-1037

According to our database1, Pantea Kiaei authored at least 16 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Gate-Level Side-Channel Leakage Ranking With Architecture Correlation Analysis.
IEEE Trans. Emerg. Top. Comput., 2024

2023
Architecture Support for Bitslicing.
IEEE Trans. Emerg. Top. Comput., 2023

2022
SoC Root Canal! Root Cause Analysis of Power Side-Channel Leakage in System-on-Chip Designs.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Gate-Level Side-Channel Leakage Assessment with Architecture Correlation Analysis.
CoRR, 2022

Leverage the Average: Averaged Sampling in Pre-Silicon Side-Channel Leakage Assessment.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021
Programmable RO (PRO): A Multipurpose Countermeasure against Side-channel and Fault Injection Attacks.
IACR Cryptol. ePrint Arch., 2021

Saidoyoki: Evaluating side-channel leakage in pre- and post-silicon setting.
IACR Cryptol. ePrint Arch., 2021

Synthesis of Parallel Synchronous Software.
IEEE Embed. Syst. Lett., 2021

Dimming Down LED: An Open-source Threshold Implementation on Light Encryption Device (LED) Block Cipher.
CoRR, 2021

Real-time Detection and Adaptive Mitigation of Power-based Side-Channel Leakage in SoC.
CoRR, 2021

Programmable RO (PRO): A Multipurpose Countermeasure against Side-channel and Fault Injection Attack.
CoRR, 2021

SN4KE: Practical Mutation Testing at Binary Level.
CoRR, 2021

Rewrite to Reinforce: Rewriting the Binary to Apply Countermeasures against Fault Injection.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Domain-Oriented Masked Instruction Set Architecture for RISC-V.
IACR Cryptol. ePrint Arch., 2020

Custom Instruction Support for Modular Defense against Side-channel and Fault Attacks.
IACR Cryptol. ePrint Arch., 2020

2019
SKIVA: Flexible and Modular Side-channel and Fault Countermeasures.
IACR Cryptol. ePrint Arch., 2019


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