Pankaj Golani

According to our database1, Pankaj Golani authored at least 7 papers between 2006 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2014
Area-Efficient Asynchronous Multilevel Single-Track Pipeline Template.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2011
Energy and Performance Models for Synchronous and Asynchronous Communication.
IEEE Trans. Very Large Scale Integr. Syst., 2011

An area-efficient multi-level single-track pipeline template.
Proceedings of the Design, Automation and Test in Europe, 2011

2009
Crosstalk in High-Performance Asynchronous Designs.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

2007
Design of a High-Speed Asynchronous Turbo Decoder.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006
Back-Annotation in High-Speed Asynchronous Design.
J. Low Power Electron., 2006

High-Performance Noise-Robust Asynchronous Circuits.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006


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