Panagiotis Chaourani

According to our database, Panagiotis Chaourani authored at least 9 papers between 2011 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Clock tree generation by abutment in synchoros VLSI design.

Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani

Microprocess. Microsystems, 2023

2019

Inductors in a Monolithic 3-D Process: Performance Analysis and Design Guidelines.

Panagiotis Chaourani, Saul Rodriguez, Per-Erik Hellström, Ana Rusu

IEEE Trans. Very Large Scale Integr. Syst., 2019

Regional Clock Tree Generation by Abutment in Synchoros VLSI Design.

Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani

CoRR, 2019

2018

An Evaluation of the Equivalent Inverter Modeling Approach.

Ioannis Messaris, Christina Galani, Maria Ntogramatzi, Nikolaos Karagiorgos, Panagiotis Chaourani, Andreas Tzormpatzoglou, Sotirios K. Goudos, Spyridon Nikolaidis

Circuits Syst. Signal Process., 2018

2017

Enabling area efficient RF ICs through monolithic 3D integration.

Panagiotis Chaourani, Per-Erik Hellström, Saul Rodriguez, Raul Onet, Ana Rusu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2015

A study for replacing CMOS gates by equivalent inverters.

Christina Galani, Andreas Tsormpatzoglou, Panagiotis Chaourani, Ioannis Messaris, Spiros Nikolaidis

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

An analytical model for the CMOS inverter.

Panagiotis Chaourani, Ioannis Messaris, Nikolaos Fasarakis, Maria Ntogramatzi, Sotirios K. Goudos, Spiros Nikolaidis

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

A unified CMOS inverter model for planar and FinFET nanoscale technologies.

Panagiotis Chaourani, Spyridon Nikolaidis

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2011

Pass Transistor Operation Modeling for Nanoscale Technologies.

Panagiotis Chaourani, Ilias Pappas, Spiros Nikolaidis, Abdoul Rjoub

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011