Palanichamy Manikandan

According to our database, Palanichamy Manikandan authored at least 12 papers between 2006 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique.

Papa-Sidi Ba, Sophie Dupuis, Palanichamy Manikandan, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Selective Algorithms for Built-In Self-Test and Self-Diagnosis in Embedded SRAMS.

Palanichamy Manikandan, Mohammad Areef, Bjørn B. Larsen, Vladimir Hahanov

J. Low Power Electron., 2015

Hardware Trojan prevention using layout-level design approach.

Papa-Sidi Ba, Palanichamy Manikandan, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre

Proceedings of the European Conference on Circuit Theory and Design, 2015

2013

Path Delay Fault Test and BIST.

Palanichamy Manikandan

PhD thesis, 2013

Quantum modeling and repairing digital systems.

Baghdadi Ammar Awni Abbas, Vladimir Ivanovich Hahanov, Palanichamy Manikandan, Eugenia Litvinova, S. Dementiev

Proceedings of the East-West Design & Test Symposium, 2013

2011

Design of embedded TCAM based longest prefix match search engine.

Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas

Microprocess. Microsystems, 2011

A programmable BIST with macro and micro codes for embedded SRAMs.

Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas, Mohammad Areef

Proceedings of the 9th East-West Design & Test Symposium, 2011

An Enhanced Path Delay Fault Simulator for Combinational Circuits.

Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010

Experiments with ABIST test methodology applied to path delay fault testing.

Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas

Proceedings of the 2010 East-West Design & Test Symposium, 2010

Path-Delay Fault Testing in Embedded Content Addressable Memories.

Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009

Design of novel CAM core cell structures for an efficient implementation of low power BCAM system.

Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2006

Asynchronous Design Methodology for an Efficient Implementation of Low power ALU.

Palanichamy Manikandan, B. D. Liu, L. Y. Chiou, G. Sundar, Chittaranjan R. Mandal

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006