Padmanabh Deshmukh

According to our database, Padmanabh Deshmukh authored at least 2 papers between 2017 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A 0.24pJ/bit, 16Gbps OOK Transmitter Circuit in 45-nm CMOS for Inter and Intra-Chip Wireless Interconnects.

Tanmay Shinde, Suryanarayanan Subramaniam, Padmanabh Deshmukh, M. Meraj Ahmed, Mark A. Indovina, Amlan Ganguly

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017

A 0.36pJ/bit, 17Gbps OOK receiver in 45-nm CMOS for inter and intra-chip wireless interconnects.

Suryanarayanan Subramaniam, Tanmay Shinde, Padmanabh Deshmukh, Md Shahriar Shamim, Mark A. Indovina, Amlan Ganguly

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017