Pablo Robelly

According to our database1, Pablo Robelly authored at least 15 papers between 2004 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2008
A HW/SW design methodology for embedded SIMD vector signal processors.
Int. J. Embed. Syst., 2008

A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals.
Proceedings of the ESSCIRC 2008, 2008

2006
An algebraic approach for the design and automatic code generation of signal processing algorithms into SIMD vector processors.
PhD thesis, 2006

Energy efficiency vs. programmability trade-off: architectures and design principles.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

A GFLOPS Vector-DSP for Broadband Wireless Applications.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures.
Proceedings of the Embedded Computer Systems: Architectures, 2005

Design and automatic code generation of the LMS algorithm for SIMD signal processors.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

A Compiler-friendly and Low-power DSP architecture.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005

Design and automatic code generation of a two-dimensional fast cosine transform for SIMD DSP architectures.
Proceedings of the 13th European Signal Processing Conference, 2005

2004
Generated DSP Cores for Implementation of an OFDM Communication System.
Proceedings of the Computer Systems: Architectures, 2004

Synchronous Transfer Architecture (STA).
Proceedings of the Computer Systems: Architectures, 2004

Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

Compiler Scheduling for STA-Processors.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

Implementation of recursive digital filters into vector SIMD DSP architectures.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004


  Loading...