Pablo Huerta

According to our database1, Pablo Huerta authored at least 18 papers between 2004 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
C-slow retimed parallel histogram architectures for consumer imaging devices.
IEEE Trans. Consumer Electron., 2013

A Parallel Quantum Histogram Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Parallel pipelined histogram architecture via C-slow retiming.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

2011
Genetic Algorithm for Boolean minimization in an FPGA cluster.
J. Supercomput., 2011

Parallel pipelined array architectures for real-time histogram computation in consumer devices.
IEEE Trans. Consumer Electron., 2011

A Key Size Configurable High Speed RSA Coprocessor.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2010
Content-based image retrieval algorithm acceleration in a low-cost reconfigurable FPGA cluster.
J. Syst. Archit., 2010

OpenCL-based design methodology for application-specific processors.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Customized Exposed Datapath Soft-Core Design Flow with Compiler Support.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Symmetric Multiprocessor Systems on FPGA.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Speeding up combinational synthesis in an FPGA cluster.
Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009

Hardware accelerated montecarlo financial simulation over low cost FPGA cluster.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

2008
Self-reconfigurable secure file system for embedded Linux.
IET Comput. Digit. Tech., 2008

Operating System for Symmetric Multiprocessors on FPGA.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

2007
Secure IP downloading for SRAM FPGAs.
Microprocess. Microsystems, 2007

2006
A Self-Reconfigurable Multimedia Player on FPGA.
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

2005
A secure self-reconfiguring architecture based on open-source hardware.
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005

2004
Platform Based on Open-Source Cores for Industrial Applications.
Proceedings of the 2004 Design, 2004


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