P. T. Vanathi
According to our database1,
P. T. Vanathi
authored at least 10 papers
between 2008 and 2023.
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Collaborative distances:
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Bibliography
2023
Erratum: Diode Connected Transistor-Based Low PDP Adiabatic Full Adder in 7nm FINFET Technology for MIMO Applications.
J. Circuits Syst. Comput., September, 2023
Diode Connected Transistor-Based Low PDP Adiabatic Full Adder in 7 nm FINFET Technology for MIMO Applications.
J. Circuits Syst. Comput., May, 2023
2020
Middle-Order Vehicle-Based Clustering Model for Reducing Packet Loss in Vehicular Ad-hoc Networks.
J. Circuits Syst. Comput., 2020
2019
Int. J. Bus. Intell. Data Min., 2019
2018
An efficient texture classification algorithm using integrated Discrete Wavelet Transform and local binary pattern features.
Cogn. Syst. Res., 2018
2015
Int. J. Inf. Commun. Technol., 2015
An efficient reversible data hiding approach for colour images based on Gaussian weighted prediction error expansion and genetic algorithm.
Int. J. Adv. Intell. Paradigms, 2015
2012
Smart Comput. Rev., 2012
Appl. Artif. Intell., 2012
2008
Proceedings of the Second Asia International Conference on Modelling and Simulation, 2008