P. R. Chidi Chidambaram

According to our database, P. R. Chidi Chidambaram authored at least 4 papers between 2014 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

Silicon Process Impact on 5G NR mmWave Front End Design and Performance.

Chuan-Cheng Cheng, Jeremy Dunworth, Sriram Kalpat, Haitao Cheng, Gang Liu, Ming-Ta Yang, Wing Sy, Joseph Wang, Kamal Sahota, P. R. Chidi Chidambaram

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

2017

Investigation of electrically gate-all-around hexagonal nanowire FET (HexFET) architecture for 5 nm node logic and SRAM applications.

Jeffrey A. Smith, Kai Ni, Ram Krishna Ghosh, Jeff Xu, Mustafa Badaroglu, P. R. Chidi Chidambaram, Suman Datta

Proceedings of the 47th European Solid-State Device Research Conference, 2017

PPAC scaling enablement for 5nm mobile SoC technology.

Mustafa Badaroglu, Jeff Xu, John Zhu, Da Yang, Jerry Bao, Seung Chul Song, Peijie Feng, Romain Ritzenthaler, Hans Mertens, Geert Eneman, Naoto Horiguchi, Jeffrey Smith, Suman Datta, David Kohen, Po-Wen Chan, Keagan Chen, P. R. Chidi Chidambaram

Proceedings of the 47th European Solid-State Device Research Conference, 2017

2014

Improved device variability in scaled MOSFETs with deeply retrograde channel profile.

Jason Woo, Po-Yen Chien, Frank Yang, Seung Chul Song, P. R. Chidi Chidambaram, Joseph Wang, Geoffrey Yeap

Microelectron. Reliab., 2014