P. Marinucci

According to our database1, P. Marinucci authored at least 5 papers between 1995 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2003
Design of a fault tolerant solid state mass memory.
IEEE Trans. Reliab., 2003

2000
A Fault-Tolerant 176 Gbit Solid State Mass Memory Architecture.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1999
Design of Fault-Tolerant Solid State Mass Memory.
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

Failure Tests on 64 Mb SDRAM in Radiation Environment.
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

1995
Analysis and implementation of a VLSI neural network.
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995


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