P. Huc

According to our database1, P. Huc authored at least 6 papers between 1994 and 1996.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

1996
Bridging fault coverage improvement by power supply control.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

The Logic Threshold Based Voting: A Model for Local Feedback Bridging Fault.
Proceedings of the Dependable Computing, 1996

1995
The concept of resistance interval: a new parametric model for realistic resistive bridging fault.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Serial transistor network modeling for bridging fault simulation.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1994
CMOS bridging fault modeling.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

The Configuration Ratio: A Model for Simulating CMOS Intra-Gate Bridge with Variable Logic Thresholds.
Proceedings of the Dependable Computing, 1994


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