Ozcan Ozturk
Orcid: 0000-0002-6870-8430Affiliations:
- Bilkent University, Dept. of Computer Engineering, Ankara, Turkey
- Pennsylvania State University, CSE Department, University Park, PA, USA
According to our database1,
Ozcan Ozturk
authored at least 138 papers
between 2004 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE Trans. Computers, May, 2024
2023
Microprocess. Microsystems, April, 2023
HLS-based High-throughput and Work-efficient Synthesizable Graph Processing Template Pipeline.
ACM Trans. Embed. Comput. Syst., March, 2023
Treasure What You Have: Exploiting Similarity in Deep Neural Networks for Efficient Video Processing.
CoRR, 2023
Proceedings of the 31st Signal Processing and Communications Applications Conference, 2023
Proceedings of the 34th International Workshop on Rapid System Prototyping, 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
Proceedings of the IEEE Conference on Dependable and Secure Computing, 2023
2022
ACM Trans. Design Autom. Electr. Syst., 2022
J. Supercomput., 2022
Special issue on recent advances in autonomous vehicle solutions in the digital continuum.
Computing, 2022
Proceedings of the 30th Signal Processing and Communications Applications Conference, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
ILP formulation and heuristic method for energy-aware application mapping on 3D-NoCs.
J. Supercomput., 2021
2020
IEEE Trans. Emerg. Top. Comput., 2020
Exploiting architectural features of a computer vision platform towards reducing memory stalls.
J. Real Time Image Process., 2020
IET Comput. Digit. Tech., 2020
Temperature-Aware Core Mapping for Heterogeneous 3D NoC Design Through Constraint Programming.
Proceedings of the 28th Euromicro International Conference on Parallel, 2020
2019
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019
Proceedings of the INTESA 2019 Proceedings, 2019
2018
Classifying Data Blocks at Subpage Granularity With an On-Chip Page Table to Improve Coherence in Tiled CMPs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Embed. Syst. Lett., 2018
2017
IEEE Trans. Computers, 2017
Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy.
Microprocess. Microsystems, 2017
Proceedings of the 2017 IEEE International Conference on Microelectronic Systems Education, 2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
2016
Pipelined fission for stream programs with dynamic selectivity and partitioned state.
J. Parallel Distributed Comput., 2016
Implications of non-volatile memory as primary storage for database management systems.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Proceedings of the 11th International Design & Test Symposium, 2016
Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation, 2016
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
Boosting performance of directory-based cache coherence protocols with coherence bypass at subpage granularity and a novel on-chip page table.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
2015
J. Supercomput., 2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
JSRAM: A Circuit-Level Technique for Trading-Off Robustness and Capacity in Cache Memories.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Architectural Requirements for Energy Efficient Execution of Graph Analytics Applications.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Hybrid stacked memory architecture for energy efficient embedded chip-multiprocessors based on compiler directed approach.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Exploiting Heterogeneity in Cache Hierarchy in Dark-Silicon 3D Chip Multi-processors.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
2014
Comput. Electr. Eng., 2014
Adaptive Compute-phase Prediction and Thread Prioritization to Mitigate Memory Access Latency.
Proceedings of the 2nd International Workshop on Many-core Embedded Systems, 2014
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014
Proceedings of the 43rd International Conference on Parallel Processing Workshops, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
Hardware/software approaches for reducing the process variation impact on instruction fetches.
ACM Trans. Design Autom. Electr. Syst., 2013
Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems.
IEEE Trans. Computers, 2013
Improving application behavior on heterogeneous manycore systems through kernel mapping.
Parallel Comput., 2013
J. Electron. Test., 2013
Staggered latch bus: A reliable offset switched architecture for long on-chip interconnect.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Proceedings of the 21st Euromicro International Conference on Parallel, 2013
2012
Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012
2011
J. Parallel Distributed Comput., 2011
Comput. Lang. Syst. Struct., 2011
2010
IET Comput. Digit. Tech., 2010
Comput. Electr. Eng., 2010
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Int. J. Embed. Syst., 2009
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the Languages and Compilers for Parallel Computing, 2009
Using dynamic compilation for continuing execution under reduced memory availability.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 2009 International Conference on Compilers, 2009
2008
ACM Trans. Design Autom. Electr. Syst., 2008
ACM Trans. Design Autom. Electr. Syst., 2008
Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2008
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008
2007
IEEE Trans. Parallel Distributed Syst., 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Enhancing Locality in Two-Dimensional Space through Integrated Computation and Data Mappings.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 44th Design Automation Conference, 2007
Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors.
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the Fifth International Symposium on Code Generation and Optimization (CGO 2007), 2007
2006
Energy-Aware Code Replication for Improving Reliability in Embedded Chip Multiprocessors.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
An Integer Linear Programming Based Approach to Simultaneous Memory Space Partitioning and Data Allocation for Chip Multiprocessors.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Reducing Memory Requirements through Task Recomputation in Embedded Multi-CPU Systems.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the Computer and Information Sciences, 2006
Proceedings of the 12th International Conference on Parallel and Distributed Systems, 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Selective code/data migration for reducing communication energy in embedded MpSoC architectures.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Dynamic partitioning of processing and memory resources in embedded MPSoC architectures.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the Third Conference on Computing Frontiers, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Compiler-Guided data compression for reducing memory consumption of embedded applications.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
IEEE Trans. Parallel Distributed Syst., 2005
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
Proceedings of the 11th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2005), 2005
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Integrating loop and data optimizations for locality within a constraint network based framework.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the Languages and Compilers for High Performance Computing, 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
Proceedings of the Euro-Par 2004 Parallel Processing, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 2004 International Conference on Compilers, 2004